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authorArnd Bergmann <arnd@arndb.de>2023-02-16 22:06:41 +0100
committerArnd Bergmann <arnd@arndb.de>2023-02-16 22:06:42 +0100
commit5be374d0d1c4fc8731736a269083747412901053 (patch)
tree8ba950b19224bd5b0cf0367bc0f304b6b9d7d7f1 /arch
parent18b68c695ca6f35c24a016c5751bfdefda1d3a3a (diff)
parent2d050f06485ae987ba57da33bc4f7dccd4fd7485 (diff)
Merge tag 'socfpga_dts_updates_for_v6.3_part2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/dt
SoCFPGA dts updates for v6.3, part 2 - Add support for the enclustra PE1 board that is based on Arria10 * tag 'socfpga_dts_updates_for_v6.3_part2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: ARM: dts: socfpga: Add enclustra PE1 devicetree dt-bindings: altera: Add enclustra mercury PE1 Link: https://lore.kernel.org/r/20230216160910.509065-1-dinguyen@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/Makefile1
-rw-r--r--arch/arm/boot/dts/socfpga_arria10_mercury_pe1.dts55
2 files changed, 56 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index f78c0ae16bc5..5eddc0a53130 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1187,6 +1187,7 @@ dtb-$(CONFIG_ARCH_S5PV210) += \
dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += \
socfpga_arria5_socdk.dtb \
socfpga_arria10_chameleonv3.dtb \
+ socfpga_arria10_mercury_pe1.dtb \
socfpga_arria10_socdk_nand.dtb \
socfpga_arria10_socdk_qspi.dtb \
socfpga_arria10_socdk_sdmmc.dtb \
diff --git a/arch/arm/boot/dts/socfpga_arria10_mercury_pe1.dts b/arch/arm/boot/dts/socfpga_arria10_mercury_pe1.dts
new file mode 100644
index 000000000000..cf533f76a9fd
--- /dev/null
+++ b/arch/arm/boot/dts/socfpga_arria10_mercury_pe1.dts
@@ -0,0 +1,55 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2023 Steffen Trumtrar <kernel@pengutronix.de>
+ */
+/dts-v1/;
+#include "socfpga_arria10_mercury_aa1.dtsi"
+
+/ {
+ model = "Enclustra Mercury+ PE1";
+ compatible = "enclustra,mercury-pe1", "enclustra,mercury-aa1",
+ "altr,socfpga-arria10", "altr,socfpga";
+
+ aliases {
+ ethernet0 = &gmac0;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ };
+};
+
+&gmac0 {
+ status = "okay";
+};
+
+&gpio0 {
+ status = "okay";
+};
+
+&gpio1 {
+ status = "okay";
+};
+
+&gpio2 {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay";
+};
+
+&mmc {
+ status = "okay";
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+ dr_mode = "host";
+};