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authorConor Dooley <conor.dooley@microchip.com>2022-04-13 08:58:30 +0100
committerStephen Boyd <sboyd@kernel.org>2022-04-22 18:40:07 -0700
commit2b6190c804238cbdca4e4fbe20304151203a3837 (patch)
treed0afd96ffac55f04675782129d821e0f32e304ff /block/blk-wbt.c
parenta2438f82366eaeb4dc122c021884ea8deea5b215 (diff)
riscv: dts: microchip: fix usage of fic clocks on mpfs
The fic clocks passed to the pcie controller and other peripherals in the device tree are not the clocks they actually run on. The fics are actually clock domain crossers & the clock config blocks output is the mss/cpu side input to the interconnect. The peripherals are actually clocked by fixed frequency clocks embedded in the fpga fabric. Fix the device tree so that these peripherals use the correct clocks. The fabric side FIC0 & FIC1 inputs both use the same 125 MHz, so only one clock is created for them. Fixes: 528a5b1f2556 ("riscv: dts: microchip: add new peripherals to icicle kit device tree") Reviewed-by: Daire McNamara <daire.mcnamara@microchip.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20220413075835.3354193-4-conor.dooley@microchip.com Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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