diff options
| author | Lars-Peter Clausen <lars@metafoo.de> | 2023-01-14 15:34:58 -0800 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2023-01-18 10:49:48 -0800 |
| commit | 3ed741db04f58e8df0d46cec7ecfc4bfd075f047 (patch) | |
| tree | cc92f69c1ae777f1da674720c36462a5dbe1bfe9 /drivers/clk/clk-versaclock5.c | |
| parent | 1b929c02afd37871d5afb9d498426f83432e71c2 (diff) | |
clk: vc5: Use `clamp()` to restrict PLL range
The VCO frequency needs to be within a certain range and the driver
enforces this.
Make use of the clamp macro to implement this instead of open-coding it.
This makes the code a bit shorter and also semanticly stronger.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Link: https://lore.kernel.org/r/20230114233500.3294789-1-lars@metafoo.de
Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/clk-versaclock5.c')
| -rw-r--r-- | drivers/clk/clk-versaclock5.c | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/drivers/clk/clk-versaclock5.c b/drivers/clk/clk-versaclock5.c index e9737969170e..54fee43d6564 100644 --- a/drivers/clk/clk-versaclock5.c +++ b/drivers/clk/clk-versaclock5.c @@ -449,10 +449,7 @@ static long vc5_pll_round_rate(struct clk_hw *hw, unsigned long rate, u32 div_int; u64 div_frc; - if (rate < VC5_PLL_VCO_MIN) - rate = VC5_PLL_VCO_MIN; - if (rate > VC5_PLL_VCO_MAX) - rate = VC5_PLL_VCO_MAX; + rate = clamp(rate, VC5_PLL_VCO_MIN, VC5_PLL_VCO_MAX); /* Determine integer part, which is 12 bit wide */ div_int = rate / *parent_rate; |