diff options
| author | Peng Fan <peng.fan@nxp.com> | 2022-06-09 21:29:01 +0800 |
|---|---|---|
| committer | Abel Vesa <abelvesa@kernel.org> | 2022-06-16 17:28:59 +0300 |
| commit | f300cb7fccf69ba1835b983c76d70deb818ad194 (patch) | |
| tree | a153bb5ed165349512ec000bf780a86bbbccf830 /drivers/clk/imx | |
| parent | 5ebaf9f7da5bb2dc56d394eabfcbe46dc6b1ea8d (diff) | |
clk: imx: clk-fracn-gppll: correct rdiv
According to Reference Manual:
000b - Divide by 1
001b - Divide by 1
010b - Divide by 2
011b - Divide by 3
100b - Divide by 4
101b - Divide by 5
110b - Divide by 6
111b - Divide by 7
So only need increase rdiv by 1 when the register value is 0.
Fixes: 1b26cb8a77a4 ("clk: imx: support fracn gppll")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20220609132902.3504651-7-peng.fan@oss.nxp.com
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Diffstat (limited to 'drivers/clk/imx')
| -rw-r--r-- | drivers/clk/imx/clk-fracn-gppll.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/clk/imx/clk-fracn-gppll.c b/drivers/clk/imx/clk-fracn-gppll.c index cb06b0045e9e..025b73229cdd 100644 --- a/drivers/clk/imx/clk-fracn-gppll.c +++ b/drivers/clk/imx/clk-fracn-gppll.c @@ -149,7 +149,8 @@ static unsigned long clk_fracn_gppll_recalc_rate(struct clk_hw *hw, unsigned lon if (rate) return (unsigned long)rate; - rdiv = rdiv + 1; + if (!rdiv) + rdiv = rdiv + 1; switch (odiv) { case 0: |