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authorCarlo Caione <carlo@endlessm.com>2017-07-14 10:23:56 +0200
committerStephen Boyd <sboyd@codeaurora.org>2017-07-18 16:23:13 -0700
commitd31fd43c0f9a41e2678a1e78c0f22f0384c6edd3 (patch)
treec2628451c9e5f87a3e5f104e577032848101ab12 /drivers/clk/x86
parentf905293d655cbb8be833261ef390aaba71b44307 (diff)
clk: x86: Do not gate clocks enabled by the firmware
Read the enable register to determine if the clock is already in use by the firmware. In this case avoid gating the clock. Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Darren Hart (VMware) <dvhart@infradead.org> Signed-off-by: Carlo Caione <carlo@endlessm.com> Fixes: 282a4e4ce5f9 ("platform/x86: Enable Atom PMC platform clocks") Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/x86')
-rw-r--r--drivers/clk/x86/clk-pmc-atom.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/clk/x86/clk-pmc-atom.c b/drivers/clk/x86/clk-pmc-atom.c
index f99abc1106f0..08ef69945ffb 100644
--- a/drivers/clk/x86/clk-pmc-atom.c
+++ b/drivers/clk/x86/clk-pmc-atom.c
@@ -186,6 +186,13 @@ static struct clk_plt *plt_clk_register(struct platform_device *pdev, int id,
pclk->reg = base + PMC_CLK_CTL_OFFSET + id * PMC_CLK_CTL_SIZE;
spin_lock_init(&pclk->lock);
+ /*
+ * If the clock was already enabled by the firmware mark it as critical
+ * to avoid it being gated by the clock framework if no driver owns it.
+ */
+ if (plt_clk_is_enabled(&pclk->hw))
+ init.flags |= CLK_IS_CRITICAL;
+
ret = devm_clk_hw_register(&pdev->dev, &pclk->hw);
if (ret) {
pclk = ERR_PTR(ret);