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authorLinus Torvalds <torvalds@linux-foundation.org>2011-03-16 09:15:21 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2011-03-16 09:15:21 -0700
commit0d2ecee2bdb2a19d04bc5cefac0f86e790f1aad4 (patch)
tree2e0f08819a57e2c191f6e7fe2b2cd2f2415143bd /drivers/crypto/Kconfig
parent3ae2a1ce2e7b70254e5c9e465adefac9cba191d6 (diff)
parentf07ef1de9baeb2add514c51f59d4bc3c659c2ca4 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: crypto: tcrypt - do not attempt to write to readonly variable random: update interface comments to reflect reality crypto: picoxcell - add support for the picoxcell crypto engines crypto: sha1 - Add test vector to test partial block processing hwrng: omap - Convert release_resource to release_region/release_mem_region crypto: aesni-intel - Fix remaining leak in rfc4106_set_hash_key crypto: omap-sham - don't treat NULL clk as an error crypto: omap-aes - don't treat NULL clk as an error crypto: testmgr - mark ghash as fips_allowed crypto: testmgr - mark xts(aes) as fips_allowed crypto: skcipher - remove redundant NULL check hwrng: pixocell - add support for picoxcell TRNG crypto: aesni-intel - Don't leak memory in rfc4106_set_hash_subkey
Diffstat (limited to 'drivers/crypto/Kconfig')
-rw-r--r--drivers/crypto/Kconfig17
1 files changed, 17 insertions, 0 deletions
diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
index eab2cf7a0269..e54185223c8c 100644
--- a/drivers/crypto/Kconfig
+++ b/drivers/crypto/Kconfig
@@ -252,4 +252,21 @@ config CRYPTO_DEV_OMAP_AES
OMAP processors have AES module accelerator. Select this if you
want to use the OMAP module for AES algorithms.
+config CRYPTO_DEV_PICOXCELL
+ tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
+ depends on ARCH_PICOXCELL
+ select CRYPTO_AES
+ select CRYPTO_AUTHENC
+ select CRYPTO_ALGAPI
+ select CRYPTO_DES
+ select CRYPTO_CBC
+ select CRYPTO_ECB
+ select CRYPTO_SEQIV
+ help
+ This option enables support for the hardware offload engines in the
+ Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
+ and for 3gpp Layer 2 ciphering support.
+
+ Saying m here will build a module named pipcoxcell_crypto.
+
endif # CRYPTO_HW