diff options
| author | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2020-05-15 16:09:24 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2020-05-15 16:09:24 +0200 |
| commit | f877a18c08fa6674364e469f318a3069c68204d2 (patch) | |
| tree | 0e0dbf76b05d4c9119f18fca1d7563ce4ac4bbbb /drivers/fpga/machxo2-spi.c | |
| parent | 84c1e51d7df85332705ffebc40ef135205492036 (diff) | |
| parent | a2b9d4eadb7727772698d06e4cbeb1a1e2538675 (diff) | |
Merge tag 'fpga-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/mdf/linux-fpga into char-misc-next
Moritz writes:
FPGA Manager changes for 5.8
Here's the first set of changes for the 5.8-rc1 merge window.
Dominic's change adds support for accessing AFU regions with gdb.
Gustavo's change is a cleanup patch regarding variable lenght arrays.
Richard's changes update dt-bindings and add support for stratix and agilex.
Sergiu's changes update spi transfers with the new delay field.
Xu's change addresses an issue with a wrong return value.
Shubhrajyoti's change makes the Zynq FPGA driver return -EPROBE_DEFER on
check of devm_clk_get failure.
Xu's change for DFL enables multiple opens.
All of these patches have been reviewed, have appropriate Acked-by's and
have been in the last few linux-next releases without issues.
Signed-off-by: Moritz Fischer <mdf@kernel.org>
* tag 'fpga-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/mdf/linux-fpga:
fpga: dfl: afu: support debug access to memory-mapped afu regions
fpga: dfl.h: Replace zero-length array with flexible-array member
arm64: dts: agilex: correct service layer driver's compatible value
dt-bindings, firmware: add compatible value Intel Stratix10 service layer binding
fpga: stratix10-soc: add compatible property value for intel agilex
arm64: dts: agilex: correct FPGA manager driver's compatible value
dt-bindings: fpga: add compatible value to Stratix10 SoC FPGA manager binding
fpga: machxo2-spi: Use new structure for SPI transfer delays
fpga: ice40-spi: Use new structure for SPI transfer delays
fpga: dfl: support multiple opens on feature device node.
Diffstat (limited to 'drivers/fpga/machxo2-spi.c')
| -rw-r--r-- | drivers/fpga/machxo2-spi.c | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/drivers/fpga/machxo2-spi.c b/drivers/fpga/machxo2-spi.c index 4d8a87641587..b316369156fe 100644 --- a/drivers/fpga/machxo2-spi.c +++ b/drivers/fpga/machxo2-spi.c @@ -157,7 +157,8 @@ static int machxo2_cleanup(struct fpga_manager *mgr) spi_message_init(&msg); tx[1].tx_buf = &refresh; tx[1].len = sizeof(refresh); - tx[1].delay_usecs = MACHXO2_REFRESH_USEC; + tx[1].delay.value = MACHXO2_REFRESH_USEC; + tx[1].delay.unit = SPI_DELAY_UNIT_USECS; spi_message_add_tail(&tx[1], &msg); ret = spi_sync(spi, &msg); if (ret) @@ -208,7 +209,8 @@ static int machxo2_write_init(struct fpga_manager *mgr, spi_message_init(&msg); tx[0].tx_buf = &enable; tx[0].len = sizeof(enable); - tx[0].delay_usecs = MACHXO2_LOW_DELAY_USEC; + tx[0].delay.value = MACHXO2_LOW_DELAY_USEC; + tx[0].delay.unit = SPI_DELAY_UNIT_USECS; spi_message_add_tail(&tx[0], &msg); tx[1].tx_buf = &erase; @@ -269,7 +271,8 @@ static int machxo2_write(struct fpga_manager *mgr, const char *buf, spi_message_init(&msg); tx.tx_buf = payload; tx.len = MACHXO2_BUF_SIZE; - tx.delay_usecs = MACHXO2_HIGH_DELAY_USEC; + tx.delay.value = MACHXO2_HIGH_DELAY_USEC; + tx.delay.unit = SPI_DELAY_UNIT_USECS; spi_message_add_tail(&tx, &msg); ret = spi_sync(spi, &msg); if (ret) { @@ -317,7 +320,8 @@ static int machxo2_write_complete(struct fpga_manager *mgr, spi_message_init(&msg); tx[1].tx_buf = &refresh; tx[1].len = sizeof(refresh); - tx[1].delay_usecs = MACHXO2_REFRESH_USEC; + tx[1].delay.value = MACHXO2_REFRESH_USEC; + tx[1].delay.unit = SPI_DELAY_UNIT_USECS; spi_message_add_tail(&tx[1], &msg); ret = spi_sync(spi, &msg); if (ret) |