diff options
| author | Vinay Belgaumkar <vinay.belgaumkar@intel.com> | 2023-10-17 12:53:09 -0700 |
|---|---|---|
| committer | Andi Shyti <andi.shyti@linux.intel.com> | 2023-10-18 18:44:14 +0200 |
| commit | 5fde104ea8587c547732a06d9d6473f6e7e4ac1c (patch) | |
| tree | 9e7e16d8040b8cd86eecc9cbe7f0d9a7e6617e34 /drivers/fpga/socfpga-a10.c | |
| parent | f1cdb599ce0ef909343d6c8e7d372defbaa382b9 (diff) | |
drm/i915/mtl: Don't set PIPE_CONTROL_FLUSH_L3
This bit does not cause an explicit L3 flush. We already use
PIPE_CONTROL_DC_FLUSH_ENABLE for that purpose.
v2: Use FLUSH_L3 only pre-MTL since spec will likely remain
the same going forward.
Cc: Nirmoy Das <nirmoy.das@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Nirmoy Das <nirmoy.das@intel.com>
Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231017195309.2476088-1-vinay.belgaumkar@intel.com
Diffstat (limited to 'drivers/fpga/socfpga-a10.c')
0 files changed, 0 insertions, 0 deletions