diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2014-09-09 16:49:28 +0200 | 
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2014-09-09 16:49:28 +0200 | 
| commit | 87e9d8fd26c782623b79f2968431179f29b339f2 (patch) | |
| tree | 45e2cf70f4609ee82859d28dd8a34effc750a6c5 /drivers/gpio/gpio-lynxpoint.c | |
| parent | facdb3dd378e81b8516a8faa061e0be56d2ae7be (diff) | |
| parent | 75a41826e2c5dc1dc0fd5195fc29b031c97337af (diff) | |
Merge tag 'socfpga_update_for_v3.18' of git://git.rocketboards.org/linux-socfpga-next into next/dt
Pull "arm: dts: Add Altera SDRAM EDAC bindings & devicetree entries" From Dinh Nguyen:
5 of the 6 patches are DTS updates and the 1 patch is updating
the MAINTAINERS entry with my new email address.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* tag 'socfpga_update_for_v3.18' of git://git.rocketboards.org/linux-socfpga-next:
  arm: dts: Add Altera SDRAM EDAC bindings & devicetree entries.
  ARM: dts: socfpga: memreserve first 4KB for future system use
  ARM: dts: socfpga: Add SD card detect
  ARM: dts: socfpga: remove extra alias in the ArriaV devkit
  ARM: dts: socfpga: unuse the slot-node and deprecate the supports-highspeed for dw-mmc
  MAINTAINERS: update entries for ARM/SOCFPGA platform
Diffstat (limited to 'drivers/gpio/gpio-lynxpoint.c')
| -rw-r--r-- | drivers/gpio/gpio-lynxpoint.c | 18 | 
1 files changed, 18 insertions, 0 deletions
diff --git a/drivers/gpio/gpio-lynxpoint.c b/drivers/gpio/gpio-lynxpoint.c index ff9eb911b5e4..fa945ec9ccff 100644 --- a/drivers/gpio/gpio-lynxpoint.c +++ b/drivers/gpio/gpio-lynxpoint.c @@ -407,9 +407,27 @@ static int lp_gpio_runtime_resume(struct device *dev)  	return 0;  } +static int lp_gpio_resume(struct device *dev) +{ +	struct platform_device *pdev = to_platform_device(dev); +	struct lp_gpio *lg = platform_get_drvdata(pdev); +	unsigned long reg; +	int i; + +	/* on some hardware suspend clears input sensing, re-enable it here */ +	for (i = 0; i < lg->chip.ngpio; i++) { +		if (gpiochip_is_requested(&lg->chip, i) != NULL) { +			reg = lp_gpio_reg(&lg->chip, i, LP_CONFIG2); +			outl(inl(reg) & ~GPINDIS_BIT, reg); +		} +	} +	return 0; +} +  static const struct dev_pm_ops lp_gpio_pm_ops = {  	.runtime_suspend = lp_gpio_runtime_suspend,  	.runtime_resume = lp_gpio_runtime_resume, +	.resume = lp_gpio_resume,  };  static const struct acpi_device_id lynxpoint_gpio_acpi_match[] = {  | 
