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author | Imre Deak <imre.deak@intel.com> | 2024-08-23 19:29:18 +0300 |
---|---|---|
committer | Imre Deak <imre.deak@intel.com> | 2024-08-26 16:20:47 +0300 |
commit | 594cf78dc36f31c0c7e0de4567e644f406d46bae (patch) | |
tree | 0369204ba9ad69b64a2ba2729b9d177c8d59fb86 /drivers/gpu/drm/amd/amdgpu/amdgpu.h | |
parent | 4836c6cc01a16f1ac2b436550299474ad7183c46 (diff) |
drm/i915/dp_mst: Fix MST state after a sink reset
In some cases the sink can reset itself after it was configured into MST
mode, without the driver noticing the disconnected state. For instance
the reset may happen in the middle of a modeset, or the (long) HPD pulse
generated may be not long enough for the encoder detect handler to
observe the HPD's deasserted state. In this case the sink's DPCD
register programmed to enable MST will be reset, while the driver still
assumes MST is still enabled. Detect this condition, which will tear
down and recreate/re-enable the MST topology.
v2:
- Add a code comment about adjusting the expected DP_MSTM_CTRL register
value for SST + SideBand. (Suraj, Jani)
- Print a debug message about detecting the link reset. (Jani)
- Verify the DPCD MST state only if it wasn't already determined that
the sink is disconnected.
Cc: stable@vger.kernel.org
Cc: Jani Nikula <jani.nikula@intel.com>
Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11195
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> (v1)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240823162918.1211875-1-imre.deak@intel.com
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu.h')
0 files changed, 0 insertions, 0 deletions