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authorThomas Zimmermann <tzimmermann@suse.de>2022-11-24 09:28:05 +0100
committerThomas Zimmermann <tzimmermann@suse.de>2022-11-24 09:28:05 +0100
commit1e5b3968a57d7894d5f86a2ecb58fa057cb6f7b2 (patch)
treea1beadf663bf4a318cccbfba8b4679b5fd0991c7 /drivers/gpu/drm/amd/amdgpu/amdgpu_eeprom.c
parent6fb6c979ca628583d4d0c59a0f8ff977e581ecc0 (diff)
parentd47f9580839eb6fe568e38b2084d94887fbf5ce0 (diff)
Merge drm/drm-next into drm-misc-next
Backmerging to get v6.1-rc6 into drm-misc-next. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_eeprom.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_eeprom.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_eeprom.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_eeprom.c
index 4d9eb0137f8c..7d2a908438e9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_eeprom.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_eeprom.c
@@ -79,13 +79,15 @@
* That is, for an I2C EEPROM driver everything is controlled by
* the "eeprom_addr".
*
+ * See also top of amdgpu_ras_eeprom.c.
+ *
* P.S. If you need to write, lock and read the Identification Page,
* (M24M02-DR device only, which we do not use), change the "7" to
* "0xF" in the macro below, and let the client set bit 20 to 1 in
* "eeprom_addr", and set A10 to 0 to write into it, and A10 and A1 to
* 1 to lock it permanently.
*/
-#define MAKE_I2C_ADDR(_aa) ((0xA << 3) | (((_aa) >> 16) & 7))
+#define MAKE_I2C_ADDR(_aa) ((0xA << 3) | (((_aa) >> 16) & 0xF))
static int __amdgpu_eeprom_xfer(struct i2c_adapter *i2c_adap, u32 eeprom_addr,
u8 *eeprom_buf, u16 buf_size, bool read)