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| author | Eric Huang <jinhuieric.huang@amd.com> | 2021-02-27 17:46:44 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2021-03-23 23:00:46 -0400 |
| commit | 2e2f197f4c994cf60ccd43a55b202bd0c5d679ba (patch) | |
| tree | 1dcb4318275ffd012c4b8bcdf9f47a4716bc0c60 /drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | |
| parent | 06bfc045d54cd7cb769aab5af45f6022c2ce77a7 (diff) | |
drm/amdgpu: set snoop bit in pde/pte entries for A+A
Page tables in vram mapping to cpu is changed from uncached to
cached in A+A, the snoop bit in VM_CONTEXTx_PAGE_TABLE_BASE_ADDR/
PDE0s/PDE1s/PDE2s/PTE.TFs has to be set so gpuvm walker snoop
page table data out of CPU cache.
Signed-off-by: Eric Huang <jinhuieric.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c')
0 files changed, 0 insertions, 0 deletions