diff options
| author | Imre Deak <imre.deak@intel.com> | 2024-01-29 19:55:32 +0200 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2024-04-10 19:27:23 +0300 |
| commit | 7e3025c6e7bd067d0a6be8e102b6182a04f5c5d6 (patch) | |
| tree | 63002bb5eca10e070ea44fee16d4117d9a12a354 /drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | |
| parent | 377cc98b451d049bf3d965fb414d9210a0e5959f (diff) | |
drm/i915/mtl+: Disable DP/DSC SF insertion at EOL WA
Disable the workaround inserting an SF symbol between the last DSC EOC
symbol and the subsequent BS symbol. The WA is enabled by default -
based on the register's reset value - and Bspec requires disabling it
explicitly. Bspec doesn't provide an actual WA ID for this.
Bspec: 50054, 65448, 68849
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240129175533.904590-6-imre.deak@intel.com
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h')
0 files changed, 0 insertions, 0 deletions