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| author | Monk Liu <Monk.Liu@amd.com> | 2017-05-01 17:05:02 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2017-05-24 17:40:25 -0400 |
| commit | 635e71329858f2051c015d2a8c863bbce04d1e1b (patch) | |
| tree | 525c91dcdfc6eba0e1a9d53207a70299904ff864 /drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | |
| parent | 9524354358a6ee80f1624b515f157f44b8a0ab2b (diff) | |
drm/amdgpu:change SR-IOV DMAframe scheme
According to CP/hw team requirment, to support PAL/CHAINED-IB
MCBP, kernel driver must guarantee DE_META must be inserted
right prior to the work_load DE IB (with PREEMPT flag), there
cannot be any non-work_load DE IB between-in DE_META and
work_load DE IB.
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h')
0 files changed, 0 insertions, 0 deletions