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authorMark Brown <broonie@kernel.org>2024-02-19 16:58:41 +0000
committerMark Brown <broonie@kernel.org>2024-02-19 16:58:41 +0000
commitd68ce3aa8142333a96a071a9a0207f21c04e54cc (patch)
tree15754707ec571eb08c8d6308fe2459e46b8a5468 /drivers/gpu/drm/amd/amdgpu/cz_ih.c
parentec29a4d9b7c7329afc61e7932cb91e9b292b2b74 (diff)
parentb401b621758e46812da61fa58a67c3fd8d91de0d (diff)
regulator: Merge up v6.8-rc5
There are dependencies on the PWM fixes for some new work on the PWM driver.
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/cz_ih.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/cz_ih.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/cz_ih.c b/drivers/gpu/drm/amd/amdgpu/cz_ih.c
index b8c47e0cf37a..c19681492efa 100644
--- a/drivers/gpu/drm/amd/amdgpu/cz_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/cz_ih.c
@@ -216,6 +216,11 @@ static u32 cz_ih_get_wptr(struct amdgpu_device *adev,
tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1);
WREG32(mmIH_RB_CNTL, tmp);
+ /* Unset the CLEAR_OVERFLOW bit immediately so new overflows
+ * can be detected.
+ */
+ tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 0);
+ WREG32(mmIH_RB_CNTL, tmp);
out:
return (wptr & ih->ptr_mask);