diff options
| author | Sunil Khatri <sunil.khatri@amd.com> | 2024-05-31 12:22:20 +0530 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2024-06-05 11:02:03 -0400 |
| commit | 33837d62a4cb5ef316dec4fada5c1012ddbc0239 (patch) | |
| tree | fc16050d53370af81cee072989dabd760b1da4d3 /drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | |
| parent | 34b8d94b6ce478528467ece25191c69ba97c8180 (diff) | |
drm/amdgpu: rename ip_dump_cp_queues to compute queues
Rename the variable ip_dump_cp_queues to ip_dump_compute_queue
as it represent compute queues.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c index 72676bfbac8c..e4e669d91a57 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c @@ -1496,9 +1496,9 @@ static void gfx_v11_0_alloc_ip_dump(struct amdgpu_device *adev) ptr = kcalloc(reg_count * inst, sizeof(uint32_t), GFP_KERNEL); if (ptr == NULL) { DRM_ERROR("Failed to allocate memory for GFX CP IP Dump\n"); - adev->gfx.ip_dump_cp_queues = NULL; + adev->gfx.ip_dump_compute_queues = NULL; } else { - adev->gfx.ip_dump_cp_queues = ptr; + adev->gfx.ip_dump_compute_queues = ptr; } /* Allocate memory for gfx queue registers for all the instances */ @@ -1731,7 +1731,7 @@ static int gfx_v11_0_sw_fini(void *handle) gfx_v11_0_free_microcode(adev); kfree(adev->gfx.ip_dump_core); - kfree(adev->gfx.ip_dump_cp_queues); + kfree(adev->gfx.ip_dump_compute_queues); kfree(adev->gfx.ip_dump_gfx_queues); return 0; @@ -6378,7 +6378,7 @@ static void gfx_v11_ip_print(void *handle, struct drm_printer *p) adev->gfx.ip_dump_core[i]); /* print compute queue registers for all instances */ - if (!adev->gfx.ip_dump_cp_queues) + if (!adev->gfx.ip_dump_compute_queues) return; reg_count = ARRAY_SIZE(gc_cp_reg_list_11); @@ -6394,7 +6394,7 @@ static void gfx_v11_ip_print(void *handle, struct drm_printer *p) for (reg = 0; reg < reg_count; reg++) { drm_printf(p, "%-50s \t 0x%08x\n", gc_cp_reg_list_11[reg].reg_name, - adev->gfx.ip_dump_cp_queues[index + reg]); + adev->gfx.ip_dump_compute_queues[index + reg]); } index += reg_count; } @@ -6441,7 +6441,7 @@ static void gfx_v11_ip_dump(void *handle) amdgpu_gfx_off_ctrl(adev, true); /* dump compute queue registers for all instances */ - if (!adev->gfx.ip_dump_cp_queues) + if (!adev->gfx.ip_dump_compute_queues) return; reg_count = ARRAY_SIZE(gc_cp_reg_list_11); @@ -6453,7 +6453,7 @@ static void gfx_v11_ip_dump(void *handle) /* ME0 is for GFX so start from 1 for CP */ soc21_grbm_select(adev, 1+i, j, k, 0); for (reg = 0; reg < reg_count; reg++) { - adev->gfx.ip_dump_cp_queues[index + reg] = + adev->gfx.ip_dump_compute_queues[index + reg] = RREG32(SOC15_REG_ENTRY_OFFSET( gc_cp_reg_list_11[reg])); } |