diff options
| author | Maarten Lankhorst <maarten.lankhorst@linux.intel.com> | 2019-08-12 15:14:03 +0200 | 
|---|---|---|
| committer | Maarten Lankhorst <maarten.lankhorst@linux.intel.com> | 2019-08-12 15:14:03 +0200 | 
| commit | 181ae8844578d0a80f188c1d195fd6bb91bcec81 (patch) | |
| tree | bd6ebfb8eb390ea6927603ca4e33c263c82b2cd7 /drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | |
| parent | 8f1c748b9a7751ee1297b4880788a09f7c802eb4 (diff) | |
| parent | d45331b00ddb179e291766617259261c112db872 (diff) | |
Merge remote-tracking branch 'drm/drm-fixes' into drm-misc-fixes
Backport requested for omap dma mask fix. I'm not sure it still
requires it, but just in case. :)
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 40 | 
1 files changed, 40 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c index 751567f78567..ee1ccdcf2d30 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c @@ -1321,6 +1321,39 @@ static int gfx_v8_0_rlc_init(struct amdgpu_device *adev)  	return 0;  } +static int gfx_v8_0_csb_vram_pin(struct amdgpu_device *adev) +{ +	int r; + +	r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false); +	if (unlikely(r != 0)) +		return r; + +	r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj, +			AMDGPU_GEM_DOMAIN_VRAM); +	if (!r) +		adev->gfx.rlc.clear_state_gpu_addr = +			amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj); + +	amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj); + +	return r; +} + +static void gfx_v8_0_csb_vram_unpin(struct amdgpu_device *adev) +{ +	int r; + +	if (!adev->gfx.rlc.clear_state_obj) +		return; + +	r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true); +	if (likely(r == 0)) { +		amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj); +		amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj); +	} +} +  static void gfx_v8_0_mec_fini(struct amdgpu_device *adev)  {  	amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); @@ -4785,6 +4818,10 @@ static int gfx_v8_0_hw_init(void *handle)  	gfx_v8_0_init_golden_registers(adev);  	gfx_v8_0_constants_init(adev); +	r = gfx_v8_0_csb_vram_pin(adev); +	if (r) +		return r; +  	r = adev->gfx.rlc.funcs->resume(adev);  	if (r)  		return r; @@ -4901,6 +4938,9 @@ static int gfx_v8_0_hw_fini(void *handle)  	else  		pr_err("rlc is busy, skip halt rlc\n");  	amdgpu_gfx_rlc_exit_safe_mode(adev); + +	gfx_v8_0_csb_vram_unpin(adev); +  	return 0;  }  | 
