diff options
| author | shaoyunl <shaoyun.liu@amd.com> | 2024-03-25 12:02:58 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2024-05-02 16:18:14 -0400 |
| commit | fcc5df722dbc47c3a84386a1c70647cfe153e65d (patch) | |
| tree | 2703637b2a6a10788e7b4ab9c47207c9c1ac28df /drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | |
| parent | 663bbfaf68971fa09d69a6ef8a6c4ef8bff9274d (diff) | |
drm/amdgpu: Disable unmapped doorbell handling basic mode on mes 12
The new mechanism for unmapped doorbell handling requires both driver side and
MES fw side change. The FW side changes are still not released.
Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Reviewed-by: Harish Kasiviswanthan <Harish.Kasiviswanthan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/mes_v12_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 16 |
1 files changed, 1 insertions, 15 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c index 132868b8db19..cf6dea13cc95 100644 --- a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c +++ b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c @@ -422,14 +422,7 @@ static int mes_v12_0_set_hw_resources(struct amdgpu_mes *mes) mes_set_hw_res_pkt.disable_mes_log = 1; mes_set_hw_res_pkt.use_different_vmid_compute = 1; mes_set_hw_res_pkt.enable_reg_active_poll = 1; - - /* - * No need to enable oversubscribe timer when we have unmapped doorbell - * handling support. - * handling mode - 0: disabled; 1: basic version; 2: basic+ version - */ - mes_set_hw_res_pkt.oversubscription_timer = 0; - mes_set_hw_res_pkt.unmapped_doorbell_handling = 1; + mes_set_hw_res_pkt.oversubscription_timer = 50; mes_set_hw_res_pkt.enable_mes_event_int_logging = 1; @@ -877,13 +870,6 @@ static int mes_v12_0_mqd_init(struct amdgpu_ring *ring) mqd->cp_hqd_iq_timer = regCP_HQD_IQ_TIMER_DEFAULT; mqd->cp_hqd_quantum = regCP_HQD_QUANTUM_DEFAULT; - /* - * Set CP_HQD_GFX_CONTROL.DB_UPDATED_MSG_EN[15] to enable unmapped - * doorbell handling. This is a reserved CP internal register can - * not be accesss by others - */ - mqd->reserved_184 = BIT(15); - return 0; } |