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authorXiaojie Yuan <xiaojie.yuan@amd.com>2019-07-30 11:28:20 +0800
committerAlex Deucher <alexander.deucher@amd.com>2019-08-12 12:47:47 -0500
commitdca009e71c72866f99a4e3a8acaef9315adc3e13 (patch)
tree9d802495ad8d0b7dfcb7f56fe036e1b46772ff3e /drivers/gpu/drm/amd/amdgpu/nv.c
parent05677c958ad2e852e94966e420d09745bc04b707 (diff)
drm/amdgpu: enable gfx clock gatings for navi12
enables following gfx clock gating features: - medium grained clock gating - medium grained light sleep - coarse grained clock gating - cp memory light sleep - rlc memory light sleep CGLS (Coarse Grained Light Sleep) will break s3, so don't enable it. Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/nv.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/nv.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 3e67536f0dc9..c5c71b3b628f 100644
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -641,7 +641,11 @@ static int nv_common_early_init(void *handle)
adev->external_rev_id = adev->rev_id + 20;
break;
case CHIP_NAVI12:
- adev->cg_flags = 0;
+ adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG |
+ AMD_CG_SUPPORT_GFX_MGLS |
+ AMD_CG_SUPPORT_GFX_CGCG |
+ AMD_CG_SUPPORT_GFX_CP_LS |
+ AMD_CG_SUPPORT_GFX_RLC_LS;
adev->pg_flags = AMD_PG_SUPPORT_VCN_DPG;
adev->external_rev_id = adev->rev_id + 0xa;
break;