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| author | Victor Lu <victorchengchi.lu@amd.com> | 2023-10-03 16:15:52 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2023-11-09 17:03:07 -0500 |
| commit | 85150626ea0423fd0adb5ac9b5ab4bbaff9aa30b (patch) | |
| tree | 95742e390ba2e54143694a7ba8e793ea590908d9 /drivers/gpu/drm/amd/amdgpu/soc15_common.h | |
| parent | 76d2da18afde2c78e9fc1fbcc9dc57c27ac77ac5 (diff) | |
drm/amdgpu: Use correct KIQ MEC engine for gfx9.4.3 (v5)
amdgpu_kiq_wreg/rreg is hardcoded to use MEC engine 0.
Add an xcc_id parameter to amdgpu_kiq_wreg/rreg, define W/RREG32_XCC
and amdgpu_device_xcc_wreg/rreg to use the new xcc_id parameter.
Using amdgpu_sriov_runtime to determine whether to access via kiq or
RLC is sufficient for now.
v5: add condition in amdgpu_device_xcc_w/rreg, remove trace func call
v4: avoid using amdgpu_sriov_w/rreg
v3: use W/RREG32_XCC to handle non-kiq case
v2: define amdgpu_device_xcc_wreg/rreg instead of changing parameters
of amdgpu_device_wreg/rreg
Signed-off-by: Victor Lu <victorchengchi.lu@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/soc15_common.h')
0 files changed, 0 insertions, 0 deletions