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authorGustavo Padovan <gustavo.padovan@collabora.com>2018-06-20 13:22:22 -0300
committerGustavo Padovan <gustavo.padovan@collabora.com>2018-06-20 13:22:22 -0300
commitd98c71dadc2d0debdb80beb5a478baf1e6f98758 (patch)
treebf873c28d3acced1814f8b2dba4ae69d2ed77333 /drivers/gpu/drm/amd/amdgpu/soc15_common.h
parentd67b6a2065076d763c7df626b8c54f16038ad862 (diff)
parentdaf0678c2036c918f01e4aa6035629d2debc2f30 (diff)
Merge drm-upstream/drm-next into drm-misc-next
We got a few conflicts in drm_atomic.c after merging the DRM writeback support, now we need a backmerge to unlock develop development on drm-misc-next. Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/soc15_common.h')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/soc15_common.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15_common.h b/drivers/gpu/drm/amd/amdgpu/soc15_common.h
index def865067edd..0942f492d2e1 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15_common.h
+++ b/drivers/gpu/drm/amd/amdgpu/soc15_common.h
@@ -47,6 +47,21 @@
#define WREG32_SOC15_OFFSET(ip, inst, reg, offset, value) \
WREG32((adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg) + offset, value)
+#define SOC15_WAIT_ON_RREG(ip, inst, reg, expected_value, mask, ret) \
+ do { \
+ uint32_t tmp_ = RREG32(adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg); \
+ uint32_t loop = adev->usec_timeout; \
+ while ((tmp_ & (mask)) != (expected_value)) { \
+ udelay(2); \
+ tmp_ = RREG32(adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg); \
+ loop--; \
+ if (!loop) { \
+ ret = -ETIMEDOUT; \
+ break; \
+ } \
+ } \
+ } while (0)
+
#endif