diff options
| author | Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> | 2024-01-31 08:49:41 +0530 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2024-02-07 10:00:29 -0500 |
| commit | fb5a3d037082b52a5c52be647c3936ca7651d7d5 (patch) | |
| tree | 6137cf105de23ad91181a26d74c187c36fabc849 /drivers/gpu/drm/amd/amdgpu/vega20_ih.h | |
| parent | 886571d217d7cc4e0f96f68b21238e3e25694e74 (diff) | |
drm/amd/display: Add NULL test for 'timing generator' in 'dcn21_set_pipe()'
In "u32 otg_inst = pipe_ctx->stream_res.tg->inst;"
pipe_ctx->stream_res.tg could be NULL, it is relying on the caller to
ensure the tg is not NULL.
Fixes: 474ac4a875ca ("drm/amd/display: Implement some asic specific abm call backs.")
Cc: Yongqiang Sun <yongqiang.sun@amd.com>
Cc: Anthony Koo <Anthony.Koo@amd.com>
Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Cc: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/vega20_ih.h')
0 files changed, 0 insertions, 0 deletions