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authorStylon Wang <stylon.wang@amd.com>2020-04-09 22:37:47 +0800
committerAlex Deucher <alexander.deucher@amd.com>2020-04-22 18:11:48 -0400
commite49233873604519dd38c57109d8814aaa319d509 (patch)
tree2dce44d9f00f4bc63efb51fa528f7b2069327076 /drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
parent4dc0b81442c524e69361df7cc6452e6bc99f69ff (diff)
drm/amd/display: Adjust refactored dm for color management only
[Why] Commit cdde482caabf2adad47d23f0d1e235db2c4f2b7d is causing regression from changing the order of call sequence. [How] Keep the call sequence and take in extra dm state only if plane-level color management is enabled. Fixes: cdde482caabf2a ("drm/amd/display: Refactor color management to take dm plane state") Signed-off-by: Stylon Wang <stylon.wang@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c')
-rw-r--r--drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c23
1 files changed, 12 insertions, 11 deletions
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 28b18cbd68aa..f8e431893fb5 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -3698,12 +3698,11 @@ fill_dc_plane_info_and_addr(struct amdgpu_device *adev,
}
static int fill_dc_plane_attributes(struct amdgpu_device *adev,
- struct dm_plane_state *dm_plane_state,
+ struct dc_plane_state *dc_plane_state,
struct drm_plane_state *plane_state,
struct drm_crtc_state *crtc_state)
{
struct dm_crtc_state *dm_crtc_state = to_dm_crtc_state(crtc_state);
- struct dc_plane_state *dc_plane_state = dm_plane_state->dc_state;
const struct amdgpu_framebuffer *amdgpu_fb =
to_amdgpu_framebuffer(plane_state->fb);
struct dc_scaling_info scaling_info;
@@ -3749,7 +3748,7 @@ static int fill_dc_plane_attributes(struct amdgpu_device *adev,
* Always set input transfer function, since plane state is refreshed
* every time.
*/
- ret = amdgpu_dm_update_plane_color_mgmt(dm_crtc_state, dm_plane_state);
+ ret = amdgpu_dm_update_plane_color_mgmt(dm_crtc_state, dc_plane_state);
if (ret)
return ret;
@@ -7942,6 +7941,16 @@ static int dm_update_plane_state(struct dc *dc,
DRM_DEBUG_DRIVER("Enabling DRM plane: %d on DRM crtc %d\n",
plane->base.id, new_plane_crtc->base.id);
+ ret = fill_dc_plane_attributes(
+ new_plane_crtc->dev->dev_private,
+ dc_new_plane_state,
+ new_plane_state,
+ new_crtc_state);
+ if (ret) {
+ dc_plane_state_release(dc_new_plane_state);
+ return ret;
+ }
+
ret = dm_atomic_get_state(state, &dm_state);
if (ret) {
dc_plane_state_release(dc_new_plane_state);
@@ -7967,14 +7976,6 @@ static int dm_update_plane_state(struct dc *dc,
dm_new_plane_state->dc_state = dc_new_plane_state;
- ret = fill_dc_plane_attributes(
- new_plane_crtc->dev->dev_private,
- dm_new_plane_state,
- new_plane_state,
- new_crtc_state);
- if (ret)
- return ret;
-
/* Tell DC to do a full surface update every time there
* is a plane change. Inefficient, but works for now.
*/