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| author | Alex Sierra <alex.sierra@amd.com> | 2023-04-24 14:27:26 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2023-06-09 09:39:06 -0400 |
| commit | 6e87c4229513904295674b84b6e2d12951567191 (patch) | |
| tree | 05a653ef80a828c1bd1d63ee6a49608708c338d9 /drivers/gpu/drm/amd/display/dc/link/link_validation.c | |
| parent | 17d62410aec363ec972f532fed5aba89b3f59ae7 (diff) | |
drm/amdgpu: improve wait logic at fence polling
Accomplish this by reading the seq number right away instead of sleep
for 5us. There are certain cases where the fence is ready almost
immediately. Sleep number granularity was also reduced as the majority
of the kiq tlb flush takes between 2us to 6us.
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/link/link_validation.c')
0 files changed, 0 insertions, 0 deletions