diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2021-06-21 16:51:30 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2021-06-22 16:51:45 -0400 |
commit | 8fe44c080a53ac0ccbe88053a2e40f9acca33091 (patch) | |
tree | a2d024cbfbf3c1f27b0312843c373fcdf0441b6c /drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | |
parent | 519424d776ec5e629781855a57f05aac5ef60ecb (diff) |
drm/amdgpu/display: fold DRM_AMD_DC_DCN3_1 into DRM_AMD_DC_DCN
No need for a separate flag now that DCN3.1 is not in bring up.
Fold into DRM_AMD_DC_DCN like previous DCN IPs.
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h')
-rw-r--r-- | drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 14 |
1 files changed, 1 insertions, 13 deletions
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h index 707c7d0e370a..7c4734f905d9 100644 --- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h +++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h @@ -362,11 +362,7 @@ union dmub_fw_boot_options { uint32_t skip_phy_access : 1; /**< 1 if PHY access should be skipped */ uint32_t disable_clk_gate: 1; /**< 1 if clock gating should be disabled */ uint32_t skip_phy_init_panel_sequence: 1; /**< 1 to skip panel init seq */ -#ifdef CONFIG_DRM_AMD_DC_DCN3_1 uint32_t z10_disable: 1; /**< 1 to disable z10 */ -#else - uint32_t reserved_unreleased: 1; /**< reserved for an unreleased feature */ -#endif uint32_t reserved : 25; /**< reserved */ } bits; /**< boot bits */ uint32_t all; /**< 32-bit access to bits */ @@ -631,7 +627,6 @@ enum dmub_cmd_type { * Command type used for OUTBOX1 notification enable */ DMUB_CMD__OUTBOX1_ENABLE = 71, -#ifdef CONFIG_DRM_AMD_DC_DCN3_1 /** * Command type used for all idle optimization commands. */ @@ -644,7 +639,6 @@ enum dmub_cmd_type { * Command type used for all panel control commands. */ DMUB_CMD__PANEL_CNTL = 74, -#endif /** * Command type used for EDID CEA parsing */ @@ -854,8 +848,6 @@ struct dmub_rb_cmd_mall { uint8_t reserved2; /**< Reserved bits */ }; -#ifdef CONFIG_DRM_AMD_DC_DCN3_1 - /** * enum dmub_cmd_idle_opt_type - Idle optimization command type. */ @@ -900,7 +892,7 @@ struct dmub_rb_cmd_clk_mgr_notify_clocks { struct dmub_cmd_header header; /**< header */ struct dmub_clocks clocks; /**< clock data */ }; -#endif + /** * struct dmub_cmd_digx_encoder_control_data - Encoder control data. */ @@ -2111,7 +2103,6 @@ struct dmub_rb_cmd_drr_update { struct dmub_optc_state dmub_optc_state_req; }; -#ifdef CONFIG_DRM_AMD_DC_DCN3_1 /** * enum dmub_cmd_panel_cntl_type - Panel control command. */ @@ -2146,7 +2137,6 @@ struct dmub_rb_cmd_panel_cntl { struct dmub_cmd_header header; /**< header */ struct dmub_cmd_panel_cntl_data data; /**< payload */ }; -#endif /** * Data passed from driver to FW in a DMUB_CMD__VBIOS_LVTMA_CONTROL command. @@ -2307,7 +2297,6 @@ union dmub_rb_cmd { * Definition of a DMUB_CMD__MALL command. */ struct dmub_rb_cmd_mall mall; -#ifdef CONFIG_DRM_AMD_DC_DCN3_1 /** * Definition of a DMUB_CMD__IDLE_OPT_DCN_RESTORE command. */ @@ -2322,7 +2311,6 @@ union dmub_rb_cmd { * Definition of DMUB_CMD__PANEL_CNTL commands. */ struct dmub_rb_cmd_panel_cntl panel_cntl; -#endif /** * Definition of a DMUB_CMD__ABM_SET_PIPE command. */ |