drm/amd/display: Add debug trace for dmcub FW autoload.

[Why & How]
1. Add trace code enum for easy debugging.
2. Add trace during uC boot up, including loading phy FW
   and dmcu FW.
3. Change cache memory type back to write back,
   since write through has issue when resume from S0i3 100% hang after
   3.2ms.
4. Change CW3 base address to hard code value to avoid memory overlap
   with cw1.
5. Change polling phy init done to infinite loop to avoid dcn hang when
   dmcub uC stalled.
6. Add dmcub FW dis-assembly file to repositatory for debug purpose.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 19 insertions, 2 deletions

diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_trace_buffer.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_trace_buffer.h
index 9707706ba8ce..b0ee099d8a6e 100644
--- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_trace_buffer.h
+++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_trace_buffer.h
@@ -30,8 +30,25 @@
 #define LOAD_DMCU_FW	1
 #define LOAD_PHY_FW	2
 
+
+enum dmucb_trace_code {
+	DMCUB__UNKNOWN,
+	DMCUB__MAIN_BEGIN,
+	DMCUB__PHY_INIT_BEGIN,
+	DMCUB__PHY_FW_SRAM_LOAD_BEGIN,
+	DMCUB__PHY_FW_SRAM_LOAD_END,
+	DMCUB__PHY_INIT_POLL_DONE,
+	DMCUB__PHY_INIT_END,
+	DMCUB__DMCU_ERAM_LOAD_BEGIN,
+	DMCUB__DMCU_ERAM_LOAD_END,
+	DMCUB__DMCU_ISR_LOAD_BEGIN,
+	DMCUB__DMCU_ISR_LOAD_END,
+	DMCUB__MAIN_IDLE,
+	DMCUB__PERF_TRACE,
+};
+
 struct dmcub_trace_buf_entry {
-	uint32_t trace_code;
+	enum dmucb_trace_code trace_code;
 	uint32_t tick_count;
 	uint32_t param0;
 	uint32_t param1;
@@ -40,6 +57,7 @@ struct dmcub_trace_buf_entry {
 #define TRACE_BUF_SIZE (1024) //1 kB
 #define PERF_TRACE_MAX_ENTRY ((TRACE_BUF_SIZE - 8)/sizeof(struct dmcub_trace_buf_entry))
 
+
 struct dmcub_trace_buf {
 	uint32_t entry_count;
 	uint32_t clk_freq;
@@ -47,5 +65,4 @@ struct dmcub_trace_buf {
 };
 
 
-
 #endif /* _DMUB_TRACE_BUFFER_H_ */