diff options
| author | Qingqing Zhuo <Qingqing.Zhuo@amd.com> | 2023-08-03 00:32:52 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2023-08-30 15:51:15 -0400 |
| commit | 65138eb72e1fc687be49932b9a45325598ffa01c (patch) | |
| tree | 26fba761b91c87b449196b57b5c6c74e423db6ed /drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c | |
| parent | 9d6fa6760e125542928b3f673620d1f769a55476 (diff) | |
drm/amd/display: Add DCN35 DMUB
[Why & How]
Add DMUB handling for DCN35.
Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c | 76 |
1 files changed, 75 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c b/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c index d7d142c5b06a..762549753721 100644 --- a/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c +++ b/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c @@ -36,6 +36,7 @@ #include "dmub_dcn315.h" #include "dmub_dcn316.h" #include "dmub_dcn32.h" +#include "dmub_dcn35.h" #include "os_types.h" /* * Note: the DMUB service is standalone. No additional headers should be @@ -79,6 +80,7 @@ #define DMUB_REGION5_BASE (0xA0000000) static struct dmub_srv_dcn32_regs dmub_srv_dcn32_regs; +static struct dmub_srv_dcn35_regs dmub_srv_dcn35_regs; static inline uint32_t dmub_align(uint32_t val, uint32_t factor) { @@ -311,6 +313,47 @@ static bool dmub_srv_hw_setup(struct dmub_srv *dmub, enum dmub_asic asic) break; + case DMUB_ASIC_DCN35: + dmub->regs_dcn35 = &dmub_srv_dcn35_regs; + funcs->configure_dmub_in_system_memory = dmub_dcn35_configure_dmub_in_system_memory; + funcs->send_inbox0_cmd = dmub_dcn35_send_inbox0_cmd; + funcs->clear_inbox0_ack_register = dmub_dcn35_clear_inbox0_ack_register; + funcs->read_inbox0_ack_register = dmub_dcn35_read_inbox0_ack_register; + funcs->reset = dmub_dcn35_reset; + funcs->reset_release = dmub_dcn35_reset_release; + funcs->backdoor_load = dmub_dcn35_backdoor_load; + funcs->backdoor_load_zfb_mode = dmub_dcn35_backdoor_load_zfb_mode; + funcs->setup_windows = dmub_dcn35_setup_windows; + funcs->setup_mailbox = dmub_dcn35_setup_mailbox; + funcs->get_inbox1_wptr = dmub_dcn35_get_inbox1_wptr; + funcs->get_inbox1_rptr = dmub_dcn35_get_inbox1_rptr; + funcs->set_inbox1_wptr = dmub_dcn35_set_inbox1_wptr; + funcs->setup_out_mailbox = dmub_dcn35_setup_out_mailbox; + funcs->get_outbox1_wptr = dmub_dcn35_get_outbox1_wptr; + funcs->set_outbox1_rptr = dmub_dcn35_set_outbox1_rptr; + funcs->is_supported = dmub_dcn35_is_supported; + funcs->is_hw_init = dmub_dcn35_is_hw_init; + funcs->set_gpint = dmub_dcn35_set_gpint; + funcs->is_gpint_acked = dmub_dcn35_is_gpint_acked; + funcs->get_gpint_response = dmub_dcn35_get_gpint_response; + funcs->get_gpint_dataout = dmub_dcn35_get_gpint_dataout; + funcs->get_fw_status = dmub_dcn35_get_fw_boot_status; + funcs->get_fw_boot_option = dmub_dcn35_get_fw_boot_option; + funcs->enable_dmub_boot_options = dmub_dcn35_enable_dmub_boot_options; + funcs->skip_dmub_panel_power_sequence = dmub_dcn35_skip_dmub_panel_power_sequence; + //outbox0 call stacks + funcs->setup_outbox0 = dmub_dcn35_setup_outbox0; + funcs->get_outbox0_wptr = dmub_dcn35_get_outbox0_wptr; + funcs->set_outbox0_rptr = dmub_dcn35_set_outbox0_rptr; + + funcs->get_current_time = dmub_dcn35_get_current_time; + funcs->get_diagnostic_data = dmub_dcn35_get_diagnostic_data; + + funcs->init_reg_offsets = dmub_srv_dcn35_regs_init; + + funcs->is_hw_powered_up = dmub_dcn35_is_hw_powered_up; + break; + default: return false; } @@ -728,10 +771,38 @@ enum dmub_status dmub_srv_cmd_execute(struct dmub_srv *dmub) return DMUB_STATUS_OK; } +bool dmub_srv_is_hw_pwr_up(struct dmub_srv *dmub) +{ + if (!dmub->hw_funcs.is_hw_powered_up) + return true; + + return dmub->hw_funcs.is_hw_powered_up(dmub) && + dmub->hw_funcs.is_hw_init(dmub); +} + +enum dmub_status dmub_srv_wait_for_hw_pwr_up(struct dmub_srv *dmub, + uint32_t timeout_us) +{ + uint32_t i; + + if (!dmub->hw_init) + return DMUB_STATUS_INVALID; + + for (i = 0; i <= timeout_us; i += 100) { + if (dmub_srv_is_hw_pwr_up(dmub)) + return DMUB_STATUS_OK; + + udelay(100); + } + + return DMUB_STATUS_TIMEOUT; +} + enum dmub_status dmub_srv_wait_for_auto_load(struct dmub_srv *dmub, uint32_t timeout_us) { uint32_t i; + bool hw_on = true; if (!dmub->hw_init) return DMUB_STATUS_INVALID; @@ -739,7 +810,10 @@ enum dmub_status dmub_srv_wait_for_auto_load(struct dmub_srv *dmub, for (i = 0; i <= timeout_us; i += 100) { union dmub_fw_boot_status status = dmub->hw_funcs.get_fw_status(dmub); - if (status.bits.dal_fw && status.bits.mailbox_rdy) + if (dmub->hw_funcs.is_hw_powered_up) + hw_on = dmub->hw_funcs.is_hw_powered_up(dmub); + + if (status.bits.dal_fw && status.bits.mailbox_rdy && hw_on) return DMUB_STATUS_OK; udelay(100); |