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| author | Yifan Zha <Yifan.Zha@amd.com> | 2023-02-08 16:47:35 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2023-02-14 16:04:48 -0500 |
| commit | fa9b4155c3d4e8441ea57ad10ec98504845e54bb (patch) | |
| tree | 017dc025284056c80c2fc341ec1b811018306681 /drivers/gpu/drm/amd/display/modules/freesync/freesync.c | |
| parent | 48e99fe4d3ba83d6b7bf288e90b360f83e1c6924 (diff) | |
drm/amdgpu: Revert programming GRBM_GFX_* in RLCG interface to support GFX9
[Why]
Regression of commit 72fef4980ddf ("drm/amdgpu: Remove writing GRBM_GFX_CNTL in RLCG interface under SRIOV") on GFX9.
According to GFX9 VF using different method to access GC registers including MMIO(direct) and RLCG(indirect),
removing GRBM_GFX_* writing would make PIPE/ME/VM/QUEUE selection chaos leading to some OCL benchmark failure.
For example,
using RLCG interface to program GRBM_GFX_CNTL/INDEX for selecting MEC(actually the value is only in scratch2/3),
then using MMIO directly program a MEC register in VF driver.
The register programming are invalid due to GC switched to incorrect ME.
[How]
With checking RLCG accessing flag, keep writing GRBM_GFX_* as a legacy way.
But it is still skipped on GFX10+ to avoid violation occurrence.
Signed-off-by: Yifan Zha <Yifan.Zha@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/modules/freesync/freesync.c')
0 files changed, 0 insertions, 0 deletions