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author | Philip Yang <Philip.Yang@amd.com> | 2022-04-01 15:30:12 -0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2022-04-05 10:29:47 -0400 |
commit | 0f12a22f375400a3fc42b86a0f8c23da530fb0fc (patch) | |
tree | 0877788955c2d8801fa3bcf6fdf1157793785a5a /drivers/gpu/drm/amd/display/modules/freesync | |
parent | 34452ac3038a7dea7e5407c0f06f762412e679f3 (diff) |
drm/amdgpu: Flush TLB after mapping for VG20+XGMI
For VG20 + XGMI bridge, all mappings PTEs cache in TC, this may have
stall invalid PTEs in TC because one cache line has 8 pages. Need always
flush_tlb after updating mapping.
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/modules/freesync')
0 files changed, 0 insertions, 0 deletions