diff options
author | Dave Airlie <airlied@redhat.com> | 2018-01-25 11:40:54 +1000 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2018-01-25 11:40:54 +1000 |
commit | 22bc72c8075fa350482cdbbd66597d626aa506c8 (patch) | |
tree | 4223a1282a53a07cd87ff0abbe1da5f8f172788d /drivers/gpu/drm/amd/display | |
parent | 92eb5f0c00b7c11d85ae823a814b2a34dda8a3c4 (diff) | |
parent | 87440329b06720e09c27ad1991204f4f0bd76f83 (diff) |
Merge branch 'drm-next-4.16' of git://people.freedesktop.org/~agd5f/linux into drm-next
A few more fixes for 4.16, nothing major.
A few more fixes for 4.16. This is on top of the pull request from
last week. Most notable change here is a fix to the link order for
the now separate from amdgpu GPU scheduler to fix crashes when the
modules are build into the kernel rather than as modules.
* 'drm-next-4.16' of git://people.freedesktop.org/~agd5f/linux:
drm: fix gpu scheduler link order
drm/amd/display: Demote error print to debug print when ATOM impl missing
drm/amdgpu: Avoid leaking PM domain on driver unbind (v2)
drm/amd/amdgpu: Add Polaris version check
drm/amdgpu: Reenable manual GPU reset from sysfs
drm/amdgpu: disable MMHUB power gating on raven
drm/ttm: Don't unreserve swapped BOs that were previously reserved
drm/ttm: Don't add swapped BOs to swap-LRU list
drm/amdgpu: only check for ECC on Vega10
drm/amd/powerplay: Fix smu_table_entry.handle type
drm/ttm: add VADDR_FLAG_UPDATED_COUNT to correctly update dma_page global count
drm/radeon: fill in rb backend map on evergreen/ni.
drm/amdgpu/gfx9: fix ngg enablement to clear gds reserved memory (v2)
drm/ttm: only free pages rather than update global memory count together
drm/amdgpu: fix CPU based VM updates
drm/amdgpu: fix typo in amdgpu_vce_validate_bo
drm/amdgpu: fix amdgpu_vm_pasid_fault_credit
drm/ttm: check the return value of register_shrinker
drm/radeon: fix sparse warning: Should it be static?
Diffstat (limited to 'drivers/gpu/drm/amd/display')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/bios/command_table.c | 22 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/bios/command_table2.c | 16 |
2 files changed, 19 insertions, 19 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/bios/command_table.c b/drivers/gpu/drm/amd/display/dc/bios/command_table.c index 1aefed8cf98b..4b5fdd577848 100644 --- a/drivers/gpu/drm/amd/display/dc/bios/command_table.c +++ b/drivers/gpu/drm/amd/display/dc/bios/command_table.c @@ -387,7 +387,7 @@ static void init_transmitter_control(struct bios_parser *bp) bp->cmd_tbl.transmitter_control = transmitter_control_v1_6; break; default: - dm_error("Don't have transmitter_control for v%d\n", crev); + dm_output_to_console("Don't have transmitter_control for v%d\n", crev); bp->cmd_tbl.transmitter_control = NULL; break; } @@ -911,7 +911,7 @@ static void init_set_pixel_clock(struct bios_parser *bp) bp->cmd_tbl.set_pixel_clock = set_pixel_clock_v7; break; default: - dm_error("Don't have set_pixel_clock for v%d\n", + dm_output_to_console("Don't have set_pixel_clock for v%d\n", BIOS_CMD_TABLE_PARA_REVISION(SetPixelClock)); bp->cmd_tbl.set_pixel_clock = NULL; break; @@ -1230,7 +1230,7 @@ static void init_enable_spread_spectrum_on_ppll(struct bios_parser *bp) enable_spread_spectrum_on_ppll_v3; break; default: - dm_error("Don't have enable_spread_spectrum_on_ppll for v%d\n", + dm_output_to_console("Don't have enable_spread_spectrum_on_ppll for v%d\n", BIOS_CMD_TABLE_PARA_REVISION(EnableSpreadSpectrumOnPPLL)); bp->cmd_tbl.enable_spread_spectrum_on_ppll = NULL; break; @@ -1427,7 +1427,7 @@ static void init_adjust_display_pll(struct bios_parser *bp) bp->cmd_tbl.adjust_display_pll = adjust_display_pll_v3; break; default: - dm_error("Don't have adjust_display_pll for v%d\n", + dm_output_to_console("Don't have adjust_display_pll for v%d\n", BIOS_CMD_TABLE_PARA_REVISION(AdjustDisplayPll)); bp->cmd_tbl.adjust_display_pll = NULL; break; @@ -1702,7 +1702,7 @@ static void init_set_crtc_timing(struct bios_parser *bp) set_crtc_using_dtd_timing_v3; break; default: - dm_error("Don't have set_crtc_timing for dtd v%d\n", + dm_output_to_console("Don't have set_crtc_timing for dtd v%d\n", dtd_version); bp->cmd_tbl.set_crtc_timing = NULL; break; @@ -1713,7 +1713,7 @@ static void init_set_crtc_timing(struct bios_parser *bp) bp->cmd_tbl.set_crtc_timing = set_crtc_timing_v1; break; default: - dm_error("Don't have set_crtc_timing for v%d\n", + dm_output_to_console("Don't have set_crtc_timing for v%d\n", BIOS_CMD_TABLE_PARA_REVISION(SetCRTC_Timing)); bp->cmd_tbl.set_crtc_timing = NULL; break; @@ -1901,7 +1901,7 @@ static void init_select_crtc_source(struct bios_parser *bp) bp->cmd_tbl.select_crtc_source = select_crtc_source_v3; break; default: - dm_error("Don't select_crtc_source enable_crtc for v%d\n", + dm_output_to_console("Don't select_crtc_source enable_crtc for v%d\n", BIOS_CMD_TABLE_PARA_REVISION(SelectCRTC_Source)); bp->cmd_tbl.select_crtc_source = NULL; break; @@ -2010,7 +2010,7 @@ static void init_enable_crtc(struct bios_parser *bp) bp->cmd_tbl.enable_crtc = enable_crtc_v1; break; default: - dm_error("Don't have enable_crtc for v%d\n", + dm_output_to_console("Don't have enable_crtc for v%d\n", BIOS_CMD_TABLE_PARA_REVISION(EnableCRTC)); bp->cmd_tbl.enable_crtc = NULL; break; @@ -2118,7 +2118,7 @@ static void init_program_clock(struct bios_parser *bp) bp->cmd_tbl.program_clock = program_clock_v6; break; default: - dm_error("Don't have program_clock for v%d\n", + dm_output_to_console("Don't have program_clock for v%d\n", BIOS_CMD_TABLE_PARA_REVISION(SetPixelClock)); bp->cmd_tbl.program_clock = NULL; break; @@ -2341,7 +2341,7 @@ static void init_enable_disp_power_gating( enable_disp_power_gating_v2_1; break; default: - dm_error("Don't enable_disp_power_gating enable_crtc for v%d\n", + dm_output_to_console("Don't enable_disp_power_gating enable_crtc for v%d\n", BIOS_CMD_TABLE_PARA_REVISION(EnableDispPowerGating)); bp->cmd_tbl.enable_disp_power_gating = NULL; break; @@ -2390,7 +2390,7 @@ static void init_set_dce_clock(struct bios_parser *bp) bp->cmd_tbl.set_dce_clock = set_dce_clock_v2_1; break; default: - dm_error("Don't have set_dce_clock for v%d\n", + dm_output_to_console("Don't have set_dce_clock for v%d\n", BIOS_CMD_TABLE_PARA_REVISION(SetDCEClock)); bp->cmd_tbl.set_dce_clock = NULL; break; diff --git a/drivers/gpu/drm/amd/display/dc/bios/command_table2.c b/drivers/gpu/drm/amd/display/dc/bios/command_table2.c index 946db12388d6..fea5e83736fd 100644 --- a/drivers/gpu/drm/amd/display/dc/bios/command_table2.c +++ b/drivers/gpu/drm/amd/display/dc/bios/command_table2.c @@ -118,7 +118,7 @@ static void init_dig_encoder_control(struct bios_parser *bp) bp->cmd_tbl.dig_encoder_control = encoder_control_digx_v1_5; break; default: - dm_error("Don't have dig_encoder_control for v%d\n", version); + dm_output_to_console("Don't have dig_encoder_control for v%d\n", version); bp->cmd_tbl.dig_encoder_control = NULL; break; } @@ -206,7 +206,7 @@ static void init_transmitter_control(struct bios_parser *bp) bp->cmd_tbl.transmitter_control = transmitter_control_v1_6; break; default: - dm_error("Don't have transmitter_control for v%d\n", crev); + dm_output_to_console("Don't have transmitter_control for v%d\n", crev); bp->cmd_tbl.transmitter_control = NULL; break; } @@ -270,7 +270,7 @@ static void init_set_pixel_clock(struct bios_parser *bp) bp->cmd_tbl.set_pixel_clock = set_pixel_clock_v7; break; default: - dm_error("Don't have set_pixel_clock for v%d\n", + dm_output_to_console("Don't have set_pixel_clock for v%d\n", BIOS_CMD_TABLE_PARA_REVISION(setpixelclock)); bp->cmd_tbl.set_pixel_clock = NULL; break; @@ -383,7 +383,7 @@ static void init_set_crtc_timing(struct bios_parser *bp) set_crtc_using_dtd_timing_v3; break; default: - dm_error("Don't have set_crtc_timing for v%d\n", dtd_version); + dm_output_to_console("Don't have set_crtc_timing for v%d\n", dtd_version); bp->cmd_tbl.set_crtc_timing = NULL; break; } @@ -503,7 +503,7 @@ static void init_select_crtc_source(struct bios_parser *bp) bp->cmd_tbl.select_crtc_source = select_crtc_source_v3; break; default: - dm_error("Don't select_crtc_source enable_crtc for v%d\n", + dm_output_to_console("Don't select_crtc_source enable_crtc for v%d\n", BIOS_CMD_TABLE_PARA_REVISION(selectcrtc_source)); bp->cmd_tbl.select_crtc_source = NULL; break; @@ -572,7 +572,7 @@ static void init_enable_crtc(struct bios_parser *bp) bp->cmd_tbl.enable_crtc = enable_crtc_v1; break; default: - dm_error("Don't have enable_crtc for v%d\n", + dm_output_to_console("Don't have enable_crtc for v%d\n", BIOS_CMD_TABLE_PARA_REVISION(enablecrtc)); bp->cmd_tbl.enable_crtc = NULL; break; @@ -670,7 +670,7 @@ static void init_enable_disp_power_gating( enable_disp_power_gating_v2_1; break; default: - dm_error("Don't enable_disp_power_gating enable_crtc for v%d\n", + dm_output_to_console("Don't enable_disp_power_gating enable_crtc for v%d\n", BIOS_CMD_TABLE_PARA_REVISION(enabledisppowergating)); bp->cmd_tbl.enable_disp_power_gating = NULL; break; @@ -721,7 +721,7 @@ static void init_set_dce_clock(struct bios_parser *bp) bp->cmd_tbl.set_dce_clock = set_dce_clock_v2_1; break; default: - dm_error("Don't have set_dce_clock for v%d\n", + dm_output_to_console("Don't have set_dce_clock for v%d\n", BIOS_CMD_TABLE_PARA_REVISION(setdceclock)); bp->cmd_tbl.set_dce_clock = NULL; break; |