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authorKenneth Feng <kenneth.feng@amd.com>2023-02-10 13:04:17 +0800
committerAlex Deucher <alexander.deucher@amd.com>2023-02-14 15:47:15 -0500
commit230dd6bb61173acccdfbf855ba907286e850cd67 (patch)
treee2c75ee79b95aa19917652ec310bb87abe84b56e /drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
parent677033b5c903e056d27bd58eccb48c79d92008a8 (diff)
drm/amd/amdgpu: implement mode2 reset on smu_v13_0_10
implement mode2 reset on smu_v13_0_10 Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h')
-rw-r--r--drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
index 3bc4128a22ac..2a03d85bf4e2 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
@@ -1201,6 +1201,8 @@ struct pptable_funcs {
* IPs reset varies by asic.
*/
int (*mode2_reset)(struct smu_context *smu);
+ /* for gfx feature enablement after mode2 reset */
+ int (*enable_gfx_features)(struct smu_context *smu);
/**
* @get_dpm_ultimate_freq: Get the hard frequency range of a clock