summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/display/intel_crtc.c
diff options
context:
space:
mode:
authorVille Syrjälä <ville.syrjala@linux.intel.com>2023-01-25 20:52:30 +0200
committerVille Syrjälä <ville.syrjala@linux.intel.com>2023-02-23 16:28:03 +0200
commit66560f33059ebe606cad7aef9c298a19d4f9e998 (patch)
tree1ca6a216cf643e6bc1b560caa2e6c724b07eb232 /drivers/gpu/drm/i915/display/intel_crtc.c
parent5eba7426050755c96d4b9561432b18ca000a4fd4 (diff)
drm/i915: Mark FIFO underrun disabled earlier
At least on some platforms (tested on ctg) the way vgacon does screen blanking seems to flag constant FIFO underruns, which means we have to be prepared for them while the driver is loading. Currently there is a time window between drm_crtc_init() and intel_sanitize_fifo_underrun_reporting() during which FIFO underrun reporting is in fact marked as enabled. Thus we may end up mistakenly detecting these bogus underruns during driver init. Close the race by marking FIFO underrun reporting as disabled prior to even registering the crtc. intel_sanitize_fifo_underrun_reporting()/etc. will re-enable it later if needed. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230125185234.21599-2-ville.syrjala@linux.intel.com Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_crtc.c')
-rw-r--r--drivers/gpu/drm/i915/display/intel_crtc.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
index 82be0fbe9934..b79a8834559f 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc.c
@@ -25,6 +25,7 @@
#include "intel_display_types.h"
#include "intel_drrs.h"
#include "intel_dsi.h"
+#include "intel_fifo_underrun.h"
#include "intel_pipe_crc.h"
#include "intel_psr.h"
#include "intel_sprite.h"
@@ -314,6 +315,8 @@ int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
}
crtc->plane_ids_mask |= BIT(primary->id);
+ intel_init_fifo_underrun_reporting(dev_priv, crtc, false);
+
for_each_sprite(dev_priv, pipe, sprite) {
struct intel_plane *plane;