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| author | Ankit Nautiyal <ankit.k.nautiyal@intel.com> | 2024-03-13 20:08:25 +0530 |
|---|---|---|
| committer | Ankit Nautiyal <ankit.k.nautiyal@intel.com> | 2024-03-20 11:03:28 +0530 |
| commit | 183e2568b84d7bd5ee391762043c4c53c27e53ed (patch) | |
| tree | 850b7f4fcb8bf4f99eb302e5414f0a9c3493815e /drivers/gpu/drm/i915/display/intel_dp.c | |
| parent | 4df6ac223cad36e7384ed00fe6efc114279f0df6 (diff) | |
drm/i915/scaler: Update Pipe src size check in skl_update_scaler
For Earlier platforms, the Pipe source size is 12-bits so
max pipe source width and height is 4096. For newer platforms it is
13-bits so theoretically max width/height is 8192. For few of the
earlier platforms the scaler did not use all bits of the PIPESRC,
so max scaler source size was used to make that the pipe source
size is programmed within limits, before using scaler.
This creates a problem, for MTL where scaler source size is 4096, but
max pipe source width can theroretically be 8192.
Switch the check to use the max scaler destination size, which closely
match the limits.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240313143825.3461208-1-ankit.k.nautiyal@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dp.c')
0 files changed, 0 insertions, 0 deletions