diff options
| author | Imre Deak <imre.deak@intel.com> | 2023-01-02 20:33:24 +0200 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2023-01-20 23:37:39 +0200 |
| commit | 3af2ff0840be88c6c17f057ec285ab4dc2ff214f (patch) | |
| tree | 7056f277ed0f1d830acd58764e8fab42727c720b /drivers/gpu/drm/i915/display/intel_modeset_setup.c | |
| parent | fdbc5aeb6b7824e45a0a1775a1c8d999c9f7e65a (diff) | |
drm/i915: Enable a PIPEDMC whenever its corresponding pipe is enabled
Make sure that PIPEDMCs are enabled whenever the corresponding pipe is
enabled.
This is required at least by the latest ADLP v2.18 firmware, which adds
a new handler enabled by default and running whenever the pipe is
enabled at the vertical referesh rate.
Bspec: 50344, 67620
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Tested-by: Gustavo Sousa <gustavo.sousa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230102183324.862279-1-imre.deak@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_modeset_setup.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_modeset_setup.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c b/drivers/gpu/drm/i915/display/intel_modeset_setup.c index 96395bfbd41d..52cdbd4fc2fa 100644 --- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c +++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c @@ -698,8 +698,10 @@ void intel_modeset_setup_hw_state(struct drm_i915_private *i915, drm_crtc_vblank_reset(&crtc->base); - if (crtc_state->hw.active) + if (crtc_state->hw.active) { + intel_dmc_enable_pipe(i915, crtc->pipe); intel_crtc_vblank_on(crtc_state); + } } intel_fbc_sanitize(i915); |