Merge tag 'drm-fixes-2021-01-29' of git://anongit.freedesktop.org/drm/drm

Pull drm fixes from Dave Airlie:
 "Weekly fixes for graphics, nothing too major, nouveau has a few
  regression fixes for various fallout from header changes previously,
  vc4 has two fixes, two amdgpu, and a smattering of i915 fixes.

  All seems on course for a quieter rc7, fingers crossed.

  nouveau:
   - fix svm init conditions
   - fix nv50 modesetting regression
   - fix cursor plane modifiers
   - fix > 64x64 cursor regression

  vc4:
   - Fix LBM size calculation
   - Fix high resolutions for hvs5

  i915:
   - Fix ICL MG PHY vswing
   - Fix subplatform handling
   - Fix selftest memleak
   - Clear CACHE_MODE prior to clearing residuals
   - Always flush the active worker before returning from the wait
   - Always try to reserve GGTT address 0x0

  amdgpu:
   - Fix a fan control regression on some boards
   - Fix clang warning"

* tag 'drm-fixes-2021-01-29' of git://anongit.freedesktop.org/drm/drm:
  drm/nouveau/kms/gk104-gp1xx: Fix > 64x64 cursors
  drm/nouveau/kms/nv50-: Report max cursor size to userspace
  drivers/nouveau/kms/nv50-: Reject format modifiers for cursor planes
  drm/nouveau/svm: fail NOUVEAU_SVM_INIT ioctl on unsupported devices
  drm/nouveau/dispnv50: Restore pushing of all data.
  amdgpu: fix clang build warning
  Revert "drm/amdgpu/swsmu: drop set_fan_speed_percent (v2)"
  drm/i915/gt: Always try to reserve GGTT address 0x0
  drm/i915: Always flush the active worker before returning from the wait
  drm/i915/selftest: Fix potential memory leak
  drm/i915: Check for all subplatform bits
  drm/i915: Fix ICL MG PHY vswing handling
  drm/i915/gt: Clear CACHE_MODE prior to clearing residuals
  drm/vc4: Correct POS1_SCL for hvs5
  drm/vc4: Correct lbm size and calculation
  drm/nouveau/nvif: fix method count when pushing an array

1 files changed, 12 insertions, 0 deletions

diff --git a/drivers/gpu/drm/i915/gt/gen7_renderclear.c b/drivers/gpu/drm/i915/gt/gen7_renderclear.c
index 94465374ca2f..e961ad6a3129 100644
--- a/drivers/gpu/drm/i915/gt/gen7_renderclear.c
+++ b/drivers/gpu/drm/i915/gt/gen7_renderclear.c
@@ -390,6 +390,16 @@ static void emit_batch(struct i915_vma * const vma,
 						     &cb_kernel_ivb,
 						     desc_count);
 
+	/* Reset inherited context registers */
+	gen7_emit_pipeline_invalidate(&cmds);
+	batch_add(&cmds, MI_LOAD_REGISTER_IMM(2));
+	batch_add(&cmds, i915_mmio_reg_offset(CACHE_MODE_0_GEN7));
+	batch_add(&cmds, 0xffff0000);
+	batch_add(&cmds, i915_mmio_reg_offset(CACHE_MODE_1));
+	batch_add(&cmds, 0xffff0000 | PIXEL_SUBSPAN_COLLECT_OPT_DISABLE);
+	gen7_emit_pipeline_flush(&cmds);
+
+	/* Switch to the media pipeline and our base address */
 	gen7_emit_pipeline_invalidate(&cmds);
 	batch_add(&cmds, PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
 	batch_add(&cmds, MI_NOOP);
@@ -399,9 +409,11 @@ static void emit_batch(struct i915_vma * const vma,
 	gen7_emit_state_base_address(&cmds, descriptors);
 	gen7_emit_pipeline_invalidate(&cmds);
 
+	/* Set the clear-residual kernel state */
 	gen7_emit_vfe_state(&cmds, bv, urb_size - 1, 0, 0);
 	gen7_emit_interface_descriptor_load(&cmds, descriptors, desc_count);
 
+	/* Execute the kernel on all HW threads */
 	for (i = 0; i < num_primitives(bv); i++)
 		gen7_emit_media_object(&cmds, i);