diff options
author | Dave Airlie <airlied@redhat.com> | 2018-07-30 10:39:22 +1000 |
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committer | Dave Airlie <airlied@redhat.com> | 2018-07-30 10:39:22 +1000 |
commit | 3fce4618279373efc59a91adb16c11da46cd69e5 (patch) | |
tree | 086fad6c9f260a0bcc9b6a3532c6cddc387dd907 /drivers/gpu/drm/i915/gvt/handlers.c | |
parent | ecd7963f7cf967009882fd56eaee1e87a229bea2 (diff) | |
parent | acb1872577b346bd15ab3a3f8dff780d6cca4b70 (diff) |
BackMerge v4.18-rc7 into drm-next
rmk requested this for armada and I think we've had a few
conflicts build up.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/i915/gvt/handlers.c')
-rw-r--r-- | drivers/gpu/drm/i915/gvt/handlers.c | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c index 6b50f850dc28..7a58ca555197 100644 --- a/drivers/gpu/drm/i915/gvt/handlers.c +++ b/drivers/gpu/drm/i915/gvt/handlers.c @@ -3388,6 +3388,30 @@ int intel_vgpu_default_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, } /** + * intel_vgpu_mask_mmio_write - write mask register + * @vgpu: a vGPU + * @offset: access offset + * @p_data: write data buffer + * @bytes: access data length + * + * Returns: + * Zero on success, negative error code if failed. + */ +int intel_vgpu_mask_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, + void *p_data, unsigned int bytes) +{ + u32 mask, old_vreg; + + old_vreg = vgpu_vreg(vgpu, offset); + write_vreg(vgpu, offset, p_data, bytes); + mask = vgpu_vreg(vgpu, offset) >> 16; + vgpu_vreg(vgpu, offset) = (old_vreg & ~mask) | + (vgpu_vreg(vgpu, offset) & mask); + + return 0; +} + +/** * intel_gvt_in_force_nonpriv_whitelist - if a mmio is in whitelist to be * force-nopriv register * |