diff options
| author | Ingo Molnar <mingo@kernel.org> | 2018-06-26 09:02:41 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2018-06-26 09:02:41 +0200 |
| commit | f446474889c06883a3879faa0896e2359e812a6b (patch) | |
| tree | 95634685d56dd532d1e9b73fbd07ca389296911b /drivers/gpu/drm/i915/i915_irq.c | |
| parent | 01bdee64f9cf8e15f998bf52789ed9d0ebdfa621 (diff) | |
| parent | 6f0d349d922ba44e4348a17a78ea51b7135965b1 (diff) | |
Merge branch 'linus' into perf/core, to pick up fixes
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_irq.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_irq.c | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index f9bc3aaa90d0..4a02747ac658 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -1893,9 +1893,17 @@ static void i9xx_pipestat_irq_ack(struct drm_i915_private *dev_priv, /* * Clear the PIPE*STAT regs before the IIR + * + * Toggle the enable bits to make sure we get an + * edge in the ISR pipe event bit if we don't clear + * all the enabled status bits. Otherwise the edge + * triggered IIR on i965/g4x wouldn't notice that + * an interrupt is still pending. */ - if (pipe_stats[pipe]) - I915_WRITE(reg, enable_mask | pipe_stats[pipe]); + if (pipe_stats[pipe]) { + I915_WRITE(reg, pipe_stats[pipe]); + I915_WRITE(reg, enable_mask); + } } spin_unlock(&dev_priv->irq_lock); } |