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authorDave Airlie <airlied@redhat.com>2021-12-29 14:02:10 +1000
committerDave Airlie <airlied@redhat.com>2021-12-29 14:02:44 +1000
commit2b534e90a1e31c7fc9536b512b72274cc3575f4c (patch)
treef98205ccbc118d7f4e3811b1bbc11ff0eeedf80d /drivers/gpu/drm/msm/adreno/a6xx_hfi.c
parent040bf2a9446f6ba267225d34dc4a9b14d11e5092 (diff)
parent6ed95285382d6f90a3c3a11d5806a5eb7db715c3 (diff)
Merge tag 'drm-msm-next-2021-12-26' of ssh://gitlab.freedesktop.org/drm/msm into drm-next
* dpu plane state cleanup in prep for multirect * dpu debugfs cleanup (and moving things to atomic_print_state) in prep for multirect * dp support for sc7280 * struct_mutex removal * include more GMU state in gpu devcore dumps * add support for a506 * remove old eDP sub-driver (never was used in any upstream supported devices and modern things with eDP will use DP sub-driver instead) * debugfs to disable hw gpu hang detect for (igt tests) * debugfs for dumping display hw state * and the usual assortment of cleanup and bug fixes There still seems to be a timing issue with dpu, showing up on sc7180 devices, after the bridge probe-order change. Ie. things work great if loglevel is high enough (or enough debug options are enabled, etc). We'll continue to debug this in the new year. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rob Clark <robdclark@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGs+vwr0nkwgYzuYAsCoHtypWpWav+yVvLZGsEJy8tJ56A@mail.gmail.com
Diffstat (limited to 'drivers/gpu/drm/msm/adreno/a6xx_hfi.c')
-rw-r--r--drivers/gpu/drm/msm/adreno/a6xx_hfi.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_hfi.c b/drivers/gpu/drm/msm/adreno/a6xx_hfi.c
index d4c65bf0a1b7..d73fce5fdf1f 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_hfi.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_hfi.c
@@ -36,6 +36,8 @@ static int a6xx_hfi_queue_read(struct a6xx_gmu *gmu,
hdr = queue->data[index];
+ queue->history[(queue->history_idx++) % HFI_HISTORY_SZ] = index;
+
/*
* If we are to assume that the GMU firmware is in fact a rational actor
* and is programmed to not send us a larger response than we expect
@@ -75,6 +77,8 @@ static int a6xx_hfi_queue_write(struct a6xx_gmu *gmu,
return -ENOSPC;
}
+ queue->history[(queue->history_idx++) % HFI_HISTORY_SZ] = index;
+
for (i = 0; i < dwords; i++) {
queue->data[index] = data[i];
index = (index + 1) % header->size;
@@ -600,6 +604,9 @@ void a6xx_hfi_stop(struct a6xx_gmu *gmu)
queue->header->read_index = 0;
queue->header->write_index = 0;
+
+ memset(&queue->history, 0xff, sizeof(queue->history));
+ queue->history_idx = 0;
}
}
@@ -612,6 +619,9 @@ static void a6xx_hfi_queue_init(struct a6xx_hfi_queue *queue,
queue->data = virt;
atomic_set(&queue->seqnum, 0);
+ memset(&queue->history, 0xff, sizeof(queue->history));
+ queue->history_idx = 0;
+
/* Set up the shared memory header */
header->iova = iova;
header->type = 10 << 8 | id;