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authorVinod Polimera <quic_vpolimer@quicinc.com>2023-03-02 22:03:12 +0530
committerDmitry Baryshkov <dmitry.baryshkov@linaro.org>2023-03-13 04:43:49 +0300
commitcd779808cccd50a6b079753e1d061a315effa207 (patch)
treebc6fb97440394982e01c9b4d41d39be365d94bee /drivers/gpu/drm/msm/dp/dp_link.c
parentcdfd0e6246c49dd3f798ce802a5211bc3948f9ac (diff)
drm/msm/dp: Add basic PSR support for eDP
Add support for basic panel self refresh (PSR) feature for eDP. Add a new interface to set PSR state in the sink from DPU. Program the eDP controller to issue PSR enter and exit SDP to the sink. Signed-off-by: Sankeerth Billakanti <quic_sbillaka@quicinc.com> Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/524734/ Link: https://lore.kernel.org/r/1677774797-31063-10-git-send-email-quic_vpolimer@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Diffstat (limited to 'drivers/gpu/drm/msm/dp/dp_link.c')
-rw-r--r--drivers/gpu/drm/msm/dp/dp_link.c36
1 files changed, 36 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/dp/dp_link.c b/drivers/gpu/drm/msm/dp/dp_link.c
index f1f1d646539d..5a4817ac086f 100644
--- a/drivers/gpu/drm/msm/dp/dp_link.c
+++ b/drivers/gpu/drm/msm/dp/dp_link.c
@@ -937,6 +937,38 @@ static int dp_link_process_phy_test_pattern_request(
return 0;
}
+static bool dp_link_read_psr_error_status(struct dp_link_private *link)
+{
+ u8 status;
+
+ drm_dp_dpcd_read(link->aux, DP_PSR_ERROR_STATUS, &status, 1);
+
+ if (status & DP_PSR_LINK_CRC_ERROR)
+ DRM_ERROR("PSR LINK CRC ERROR\n");
+ else if (status & DP_PSR_RFB_STORAGE_ERROR)
+ DRM_ERROR("PSR RFB STORAGE ERROR\n");
+ else if (status & DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR)
+ DRM_ERROR("PSR VSC SDP UNCORRECTABLE ERROR\n");
+ else
+ return false;
+
+ return true;
+}
+
+static bool dp_link_psr_capability_changed(struct dp_link_private *link)
+{
+ u8 status;
+
+ drm_dp_dpcd_read(link->aux, DP_PSR_ESI, &status, 1);
+
+ if (status & DP_PSR_CAPS_CHANGE) {
+ drm_dbg_dp(link->drm_dev, "PSR Capability Change\n");
+ return true;
+ }
+
+ return false;
+}
+
static u8 get_link_status(const u8 link_status[DP_LINK_STATUS_SIZE], int r)
{
return link_status[r - DP_LANE0_1_STATUS];
@@ -1055,6 +1087,10 @@ int dp_link_process_request(struct dp_link *dp_link)
dp_link->sink_request |= DP_TEST_LINK_TRAINING;
} else if (!dp_link_process_phy_test_pattern_request(link)) {
dp_link->sink_request |= DP_TEST_LINK_PHY_TEST_PATTERN;
+ } else if (dp_link_read_psr_error_status(link)) {
+ DRM_ERROR("PSR IRQ_HPD received\n");
+ } else if (dp_link_psr_capability_changed(link)) {
+ drm_dbg_dp(link->drm_dev, "PSR Capabiity changed");
} else {
ret = dp_link_process_link_status_update(link);
if (!ret) {