diff options
| author | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2021-03-31 13:57:19 +0300 |
|---|---|---|
| committer | Rob Clark <robdclark@chromium.org> | 2021-04-07 11:05:45 -0700 |
| commit | 076437c9e360737c85d443bbf81d5ea02b3d182d (patch) | |
| tree | 20a0c62b459a63d149a41fb5b98b243fbfd24cfb /drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | |
| parent | 80d2229bf0e7b169a1ab3adcaed9c4ce336f50b2 (diff) | |
drm/msm/dsi: move min/max PLL rate to phy config
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Tested-by: Stephen Boyd <swboyd@chromium.org> # on sc7180 lazor
Link: https://lore.kernel.org/r/20210331105735.3690009-9-dmitry.baryshkov@linaro.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'drivers/gpu/drm/msm/dsi/phy/dsi_phy.h')
| -rw-r--r-- | drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h index 39abb86446f9..000e4207dabc 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h @@ -38,6 +38,9 @@ struct msm_dsi_phy_cfg { struct msm_dsi_phy_ops ops; const struct msm_dsi_pll_ops pll_ops; + unsigned long min_pll_rate; + unsigned long max_pll_rate; + /* * Each cell {phy_id, pll_id} of the truth table indicates * if the source PLL selection bit should be set for each PHY. |