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authorJonathan Marek <jonathan@marek.ca>2020-09-11 11:09:39 -0400
committerRob Clark <robdclark@chromium.org>2020-09-12 09:59:58 -0700
commit1ef7c99d145c2759308e53bf19f2cc971677680c (patch)
tree09152ec6b0869a5b5bb6db05e37c9529437e9c77 /drivers/gpu/drm/msm/dsi/pll/dsi_pll.c
parent11550636040dddadcb2ffec18c37fb2c5105a04a (diff)
drm/msm/dsi: add support for 7nm DSI PHY/PLL
This adds support for the 7nm ("V4") DSI PHY/PLL for sm8150 and sm8250. Implementation is based on 10nm driver, but updated based on the downstream 7nm driver. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> (SM8250) Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'drivers/gpu/drm/msm/dsi/pll/dsi_pll.c')
-rw-r--r--drivers/gpu/drm/msm/dsi/pll/dsi_pll.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/dsi/pll/dsi_pll.c b/drivers/gpu/drm/msm/dsi/pll/dsi_pll.c
index 4a4aa3c61d71..a45fe95aff49 100644
--- a/drivers/gpu/drm/msm/dsi/pll/dsi_pll.c
+++ b/drivers/gpu/drm/msm/dsi/pll/dsi_pll.c
@@ -161,6 +161,10 @@ struct msm_dsi_pll *msm_dsi_pll_init(struct platform_device *pdev,
case MSM_DSI_PHY_10NM:
pll = msm_dsi_pll_10nm_init(pdev, id);
break;
+ case MSM_DSI_PHY_7NM:
+ case MSM_DSI_PHY_7NM_V4_1:
+ pll = msm_dsi_pll_7nm_init(pdev, id);
+ break;
default:
pll = ERR_PTR(-ENXIO);
break;