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authorThierry Reding <treding@nvidia.com>2020-01-31 17:59:08 +0100
committerThierry Reding <treding@nvidia.com>2020-01-31 21:29:05 +0100
commita5127a2dbe95dd72b6a21c98dee0857511f30357 (patch)
tree1162b0859531ce5f0056a75b69ffb88c8d225fc8 /drivers/gpu/drm/tegra
parent033ccdb7f6b11701623507339646013b4ce389d3 (diff)
drm/tegra: sor: Suspend on clock registration failure
Make sure the SOR module is suspenden after we fail to register the SOR pad output clock. Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/drm/tegra')
-rw-r--r--drivers/gpu/drm/tegra/sor.c13
1 files changed, 7 insertions, 6 deletions
diff --git a/drivers/gpu/drm/tegra/sor.c b/drivers/gpu/drm/tegra/sor.c
index f884185c5e9f..30c96b15d7a3 100644
--- a/drivers/gpu/drm/tegra/sor.c
+++ b/drivers/gpu/drm/tegra/sor.c
@@ -3921,15 +3921,16 @@ static int tegra_sor_probe(struct platform_device *pdev)
if (!sor->clk_pad) {
char *name;
- err = host1x_client_resume(&sor->client);
- if (err < 0) {
- dev_err(sor->dev, "failed to resume: %d\n", err);
+ name = devm_kasprintf(sor->dev, GFP_KERNEL, "sor%u_pad_clkout",
+ sor->index);
+ if (!name) {
+ err = -ENOMEM;
goto remove;
}
- name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "sor%u_pad_clkout", sor->index);
- if (!name) {
- err = -ENOMEM;
+ err = host1x_client_resume(&sor->client);
+ if (err < 0) {
+ dev_err(sor->dev, "failed to resume: %d\n", err);
goto remove;
}