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authorTomi Valkeinen <tomi.valkeinen@ideasonboard.com>2023-11-09 09:37:58 +0200
committerTomi Valkeinen <tomi.valkeinen@ideasonboard.com>2023-12-01 12:04:42 +0200
commitaceafbb5035c4bfc75a321863ed1e393d644d2d2 (patch)
treeea248f177c15a7bf6ba1cac1afb595e22205d668 /drivers/gpu/drm/tidss
parent36d1e0852680aa038e2428d450673390111b165c (diff)
drm/tidss: Return error value from from softreset
Return an error value from dispc_softreset() so that the caller can handle the errors. Reviewed-by: Aradhya Bhatia <a-bhatia1@ti.com> Link: https://lore.kernel.org/r/20231109-tidss-probe-v2-5-ac91b5ea35c0@ideasonboard.com Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Diffstat (limited to 'drivers/gpu/drm/tidss')
-rw-r--r--drivers/gpu/drm/tidss/tidss_dispc.c17
1 files changed, 12 insertions, 5 deletions
diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c b/drivers/gpu/drm/tidss/tidss_dispc.c
index bce5432d26f3..b72f1e7d4b72 100644
--- a/drivers/gpu/drm/tidss/tidss_dispc.c
+++ b/drivers/gpu/drm/tidss/tidss_dispc.c
@@ -2761,7 +2761,7 @@ static void dispc_init_errata(struct dispc_device *dispc)
}
}
-static void dispc_softreset(struct dispc_device *dispc)
+static int dispc_softreset(struct dispc_device *dispc)
{
u32 val;
int ret;
@@ -2771,8 +2771,12 @@ static void dispc_softreset(struct dispc_device *dispc)
/* Wait for reset to complete */
ret = readl_poll_timeout(dispc->base_common + DSS_SYSSTATUS,
val, val & 1, 100, 5000);
- if (ret)
- dev_warn(dispc->dev, "failed to reset dispc\n");
+ if (ret) {
+ dev_err(dispc->dev, "failed to reset dispc\n");
+ return ret;
+ }
+
+ return 0;
}
int dispc_init(struct tidss_device *tidss)
@@ -2885,8 +2889,11 @@ int dispc_init(struct tidss_device *tidss)
&dispc->memory_bandwidth_limit);
/* K2G display controller does not support soft reset */
- if (feat->subrev != DISPC_K2G)
- dispc_softreset(dispc);
+ if (feat->subrev != DISPC_K2G) {
+ r = dispc_softreset(dispc);
+ if (r)
+ return r;
+ }
tidss->dispc = dispc;