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| author | James Zhu <James.Zhu@amd.com> | 2018-09-10 14:58:16 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2018-09-26 21:09:23 -0500 |
| commit | b604545b921b0b6af1785db85bab8e790a18ddad (patch) | |
| tree | fe191256abb7a9cade854159f9b7fc81728729af /drivers/gpu/drm/tilcdc/tilcdc_external.h | |
| parent | 21cbe2f38cd94c180c4b3aad00bcb95b5f323134 (diff) | |
drm/amdgpu:Add new register offset/mask to support VCN DPG mode
New register offset/mask need to be added to support VCN DPG mode.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/tilcdc/tilcdc_external.h')
0 files changed, 0 insertions, 0 deletions