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authorRodrigo Vivi <rodrigo.vivi@intel.com>2024-08-27 17:06:28 -0400
committerRodrigo Vivi <rodrigo.vivi@intel.com>2024-08-27 17:06:28 -0400
commit04cf420bbc32a599aa2481725f708435ea19bf3d (patch)
tree232b7a3c36adc63c92ca60ec39ed5f031c2e5c53 /drivers/gpu/drm/virtio/virtgpu_submit.c
parent67733d7a71503fd3e32eeada371f8aa2516c5c95 (diff)
parente55ef65510a401862b902dc979441ea10ae25c61 (diff)
Merge drm/drm-next into drm-intel-next
Need to take some Xe bo definition in here before we can add the BMG display 64k aligned size restrictions. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/virtio/virtgpu_submit.c')
-rw-r--r--drivers/gpu/drm/virtio/virtgpu_submit.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/virtio/virtgpu_submit.c b/drivers/gpu/drm/virtio/virtgpu_submit.c
index 1c7c7f61a222..7d34cf83f5f2 100644
--- a/drivers/gpu/drm/virtio/virtgpu_submit.c
+++ b/drivers/gpu/drm/virtio/virtgpu_submit.c
@@ -48,7 +48,7 @@ struct virtio_gpu_submit {
static int virtio_gpu_do_fence_wait(struct virtio_gpu_submit *submit,
struct dma_fence *in_fence)
{
- u32 context = submit->fence_ctx + submit->ring_idx;
+ u64 context = submit->fence_ctx + submit->ring_idx;
if (dma_fence_match_context(in_fence, context))
return 0;