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author | Vasant Hegde <vasant.hegde@amd.com> | 2024-04-18 10:33:52 +0000 |
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committer | Joerg Roedel <jroedel@suse.de> | 2024-04-26 12:16:00 +0200 |
commit | c9e8701132e6cc162d082e7dad8a2e9110f5f8fd (patch) | |
tree | 3838a74483a5c32d5b16e9a1b9bc750b424644a3 /drivers/gpu | |
parent | a0c47f233e683e6a81fced5c9c9cef6fa0da9446 (diff) |
iommu/amd: Setup GCR3 table in advance if domain is SVA capable
SVA can be supported if domain is in passthrough mode or paging domain
with v2 page table. Current code sets up GCR3 table for domain with v2
page table only. Setup GCR3 table for all SVA capable domains.
- Move GCR3 init/destroy to separate function.
- Change default GCR3 table to use MAX supported PASIDs. Ideally it
should use 1 level PASID table as its using PASID zero only. But we
don't have support to extend PASID table yet. We will fix this later.
- When domain is configured with passthrough mode, allocate default GCR3
table only if device is SVA capable.
Note that in attach_device() path it will not know whether device will use
SVA or not. If device is attached to passthrough domain and if it doesn't
use SVA then GCR3 table will never be used. We will endup wasting memory
allocated for GCR3 table. This is done to avoid DTE update when
attaching PASID to device.
Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Link: https://lore.kernel.org/r/20240418103400.6229-8-vasant.hegde@amd.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'drivers/gpu')
0 files changed, 0 insertions, 0 deletions