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authorDipen Patel <dipenp@nvidia.com>2023-04-13 17:44:53 -0700
committerDipen Patel <dipenp@nvidia.com>2023-04-26 15:43:34 -0700
commit0ebc475fb636df12222faa04dd989a4e3c87f31a (patch)
treec732e0707c412aa7fd7ff348c2a9d9a1e169658c /drivers/hte/hte-tegra194.c
parentb003fb5c9df8a8923bf46e0c00cc54edcfb0fbe3 (diff)
hte: Deprecate nvidia,slices property
The relevant DT bindings deprecates nvidia,slices property from Tegra234 SoC onwards, moving the slices value per SoC data structure instead. Signed-off-by: Dipen Patel <dipenp@nvidia.com>
Diffstat (limited to 'drivers/hte/hte-tegra194.c')
-rw-r--r--drivers/hte/hte-tegra194.c31
1 files changed, 21 insertions, 10 deletions
diff --git a/drivers/hte/hte-tegra194.c b/drivers/hte/hte-tegra194.c
index 5d1f947db0f6..945c68c5e476 100644
--- a/drivers/hte/hte-tegra194.c
+++ b/drivers/hte/hte-tegra194.c
@@ -118,6 +118,7 @@ struct tegra_hte_line_data {
struct tegra_hte_data {
enum tegra_hte_type type;
+ u32 slices;
u32 map_sz;
u32 sec_map_sz;
const struct tegra_hte_line_mapped *map;
@@ -323,6 +324,7 @@ static const struct tegra_hte_data t194_aon_hte = {
.sec_map_sz = ARRAY_SIZE(tegra194_aon_gpio_sec_map),
.sec_map = tegra194_aon_gpio_sec_map,
.type = HTE_TEGRA_TYPE_GPIO,
+ .slices = 3,
};
static const struct tegra_hte_data t234_aon_hte = {
@@ -331,12 +333,21 @@ static const struct tegra_hte_data t234_aon_hte = {
.sec_map_sz = ARRAY_SIZE(tegra234_aon_gpio_sec_map),
.sec_map = tegra234_aon_gpio_sec_map,
.type = HTE_TEGRA_TYPE_GPIO,
+ .slices = 3,
};
-static const struct tegra_hte_data lic_hte = {
+static const struct tegra_hte_data t194_lic_hte = {
.map_sz = 0,
.map = NULL,
.type = HTE_TEGRA_TYPE_LIC,
+ .slices = 11,
+};
+
+static const struct tegra_hte_data t234_lic_hte = {
+ .map_sz = 0,
+ .map = NULL,
+ .type = HTE_TEGRA_TYPE_LIC,
+ .slices = 17,
};
static inline u32 tegra_hte_readl(struct tegra_hte_soc *hte, u32 reg)
@@ -639,9 +650,9 @@ static bool tegra_hte_match_from_linedata(const struct hte_chip *chip,
}
static const struct of_device_id tegra_hte_of_match[] = {
- { .compatible = "nvidia,tegra194-gte-lic", .data = &lic_hte},
+ { .compatible = "nvidia,tegra194-gte-lic", .data = &t194_lic_hte},
{ .compatible = "nvidia,tegra194-gte-aon", .data = &t194_aon_hte},
- { .compatible = "nvidia,tegra234-gte-lic", .data = &lic_hte},
+ { .compatible = "nvidia,tegra234-gte-lic", .data = &t234_lic_hte},
{ .compatible = "nvidia,tegra234-gte-aon", .data = &t234_aon_hte},
{ }
};
@@ -679,13 +690,6 @@ static int tegra_hte_probe(struct platform_device *pdev)
dev = &pdev->dev;
- ret = of_property_read_u32(dev->of_node, "nvidia,slices", &slices);
- if (ret != 0) {
- dev_err(dev, "Could not read slices\n");
- return -EINVAL;
- }
- nlines = slices << 5;
-
hte_dev = devm_kzalloc(dev, sizeof(*hte_dev), GFP_KERNEL);
if (!hte_dev)
return -ENOMEM;
@@ -697,6 +701,13 @@ static int tegra_hte_probe(struct platform_device *pdev)
dev_set_drvdata(&pdev->dev, hte_dev);
hte_dev->prov_data = of_device_get_match_data(&pdev->dev);
+ ret = of_property_read_u32(dev->of_node, "nvidia,slices", &slices);
+ if (ret != 0)
+ slices = hte_dev->prov_data->slices;
+
+ dev_dbg(dev, "slices:%d\n", slices);
+ nlines = slices << 5;
+
hte_dev->regs = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(hte_dev->regs))
return PTR_ERR(hte_dev->regs);