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author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2023-08-31 21:07:29 +0200 |
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committer | Guenter Roeck <linux@roeck-us.net> | 2023-10-27 07:27:23 -0700 |
commit | 923774d759c9f83d13b900bda9d146a918f65a45 (patch) | |
tree | a133136b465cfb52859c5aa028c534a16c790abe /drivers/hwmon/tmp513.c | |
parent | 05010fcf58e818cf71e2b4df338d84916644b749 (diff) |
hwmon: (pmbus/tda38640) Add workaround for SVID mode
TDA38640 can operate in either PMBus mode or SVID mode.
In SVID mode, by design ENABLE pin is the only option for controlling
the output rail i.e., ENABLE pin is chained to power good of another
reglator & FPGA.
In cases where the chip is configured for SVID mode, and the ENABLE pin
is set at a fixed level or is left unconnected (with an internal
pull-down), while requiring software control, the following
workaround is necessary.
The workaround utilizes ENABLE pin polarity flipping to control
output rail.
If property 'infineon,en-pin-fixed-level' is specified then
determine if chip is in SVID mode by checking BIT15 of MTP memory offset
0x44 as described in the datasheet.
If chip is in SVID mode then apply the workaround by
1. Determine EN pin level
2. Maps BIT7 of OPERATION(01h) to EN_PIN_POLARITY(BIT1) of
PB_ON_OFF_CONFIG.
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Signed-off-by: Naresh Solanki <Naresh.Solanki@9elements.com>
Link: https://lore.kernel.org/r/20230831190731.265099-3-Naresh.Solanki@9elements.com
[groeck: Dropped unnecessary line continuation]
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Diffstat (limited to 'drivers/hwmon/tmp513.c')
0 files changed, 0 insertions, 0 deletions