diff options
| author | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2022-05-08 18:56:34 +0100 |
|---|---|---|
| committer | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2022-06-14 11:53:16 +0100 |
| commit | 27f2261d16d01858b8e5baca5a1a515b040429c4 (patch) | |
| tree | d96f8c028e7e6ec37fca4bd0579d58644f924e8b /drivers/iio/dac | |
| parent | c32be7f035ae430ba9c142b03ceb9f935b09ed6b (diff) | |
iio: dac: ad5770r: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Fixes: cbbb819837f6 ("iio: dac: ad5770r: Add AD5770R support")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Alexandru Tachici <alexandru.tachici@analog.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-55-jic23@kernel.org
Diffstat (limited to 'drivers/iio/dac')
| -rw-r--r-- | drivers/iio/dac/ad5770r.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/iio/dac/ad5770r.c b/drivers/iio/dac/ad5770r.c index 7e2fd32e993a..f66d67402e43 100644 --- a/drivers/iio/dac/ad5770r.c +++ b/drivers/iio/dac/ad5770r.c @@ -140,7 +140,7 @@ struct ad5770r_state { bool ch_pwr_down[AD5770R_MAX_CHANNELS]; bool internal_ref; bool external_res; - u8 transf_buf[2] ____cacheline_aligned; + u8 transf_buf[2] __aligned(IIO_DMA_MINALIGN); }; static const struct regmap_config ad5770r_spi_regmap_config = { |