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authorJonathan Cameron <Jonathan.Cameron@huawei.com>2022-05-08 18:56:53 +0100
committerJonathan Cameron <Jonathan.Cameron@huawei.com>2022-06-14 11:53:18 +0100
commitff3211b2ba9afac80ceb795d148831dd879b30b7 (patch)
treee855d1fcbe4d6214b65f80ad7e8f1ab67e76e7a5 /drivers/iio
parentae6eeb534924ecc2afd5a394964fd6de0ca54d39 (diff)
iio: gyro: adis16130: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: 8e67875141b2 ("staging:iio:gyro: adis16130 cleanup, move to abi and bug fixes.") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-74-jic23@kernel.org
Diffstat (limited to 'drivers/iio')
-rw-r--r--drivers/iio/gyro/adis16130.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/iio/gyro/adis16130.c b/drivers/iio/gyro/adis16130.c
index b9c952e65b55..33cde9e6fca5 100644
--- a/drivers/iio/gyro/adis16130.c
+++ b/drivers/iio/gyro/adis16130.c
@@ -41,7 +41,7 @@
struct adis16130_state {
struct spi_device *us;
struct mutex buf_lock;
- u8 buf[4] ____cacheline_aligned;
+ u8 buf[4] __aligned(IIO_DMA_MINALIGN);
};
static int adis16130_spi_read(struct iio_dev *indio_dev, u8 reg_addr, u32 *val)